Apollo PRISM development was freezed in 1991 and no PRISM2 was released altough it was ready, PRISM was discontinued in 1997? perhaps. Information on it is on (zepa.net/apollo/) and (jim.rees.org/apollo-archive) netpages. On the reddit.com “Looking around Haiku, and I found this: code (or …” that says that there is something called “Iridium OS” operating system that can(?) use PRISM instruction set, but otherwise very little information about Iridium OS is to be found. If many simple (old) processors with low transistor count are combined together, all in one silicon chip and on the same silicon die, or as separately-packed processors, one way to combine them together is the Parallel Random Access Machine method, or other modern redevelopments of the PRAM principle (there are several different). Different developments about it have been made: “Global cellular automata: a path from parallel random access machines to practical implementations” Keller, at slideshare.net 15.1 2015:“matrix multiplication parallel processing”, other: “On optimal OROW-PRAM algorithms for computing recessively defined functions”, “Parallel random machines with both multiplication and…”, “Oblivious parallel ram and applications”, “Simple and work-efficient parallel algorithms for the minimum spanning tree problem” Zaroliagia, “The ralationship between several parallel computational models” Zhang 2008, “Anonymous processing with synchronous shared memory” Chlebus 2015, “TOTAL ECLIPSE - an efficient architechtural realization of the parallel random access machine”. Also if Elbrus “E2K” was released as Elbrus 2000 in 2005, already when its development team changed american cooperation in 1997, almost immediately they said that they have E2K ready (1998), and in the year 1993 they said in some international computer conference that in russia they have been developed VLIW processor that was superior to Pentium or anything in that the west have, so E2K was in existence at least from 1993 onwards if not even earlier. IBM has made its Power- series of processor open source to boost up sales, even the most modern versions, but they of course are not license free or in public domain. If not using 20 year old processors or older, perhaps FPGAs are the solution for low license cost processors without large license fees per unit, the actual production costs of silicon chip is so small that license fees are the cost factors of microprocessors. To improve performance instead of new MIT FFT Fourier transform perhaps " “Shape-adaptive transforms” on netpage (cs.tut.fi/foi/sa-dct) can be used. And digital dithering, instead of using it only for sound recording it can be applied to all kinds of data: “Generating dithering noise for maximum likelihood estimation of quantized data” 2013. Some exotic models that boost up computing to extremes are ways to use infinite numerical values or transfinite numbers: James A.D.W Anderson “Perspex machine XII: Topology of transreal numbers”, Yaroslav D. Sergeyev: “Infinity computer” and “Mathematical foundation of computer system for storing infinite infinitesimals, and executing arithmetic operations with them, Pat.Apl. 08.03.04”, W. Matthes: " The REAL computer architechture", “The REAL computer architecture resource algebra”, Oswaldo Cadenas: patent WO 2008078098A1: “Processing systems accepting exceptional numbers” (and O. Cadenas: two
s complement transreal coding). "Towards an implementation of a computer algebra system using afunctional language " Lobachev, "SINGULAR computer algebra system", "A field theory motivated approach to symbolic algebra" K. Peeters. And from netpages stackoverflow.com: "Data structures - What is good binary encoding for phi-based balanced ternary algorithms?" and stackoverflow.com: ""Algorithms based on number system base (closed)" 18.3 2011. And netpage neuraloutlet.com in which are "metallic number systems", versions of logarithmic numbers, also "Iterative denormal logarithmic number system IDLNS" (M.G. Arnold) is just one of dozens different proposed logarithmic number systems.If these theories can ever to be realized in real hardware, in FPGA or other, I dont know. Simplier way to make computation efficient is to use ternary or quaternary number suystems, if FPGAs already have ternary logic build on hardware. To make information even more dense still it is possible to use ternary and even quaternary values packed to binary form using some coding method, so that for exanple 2 or 4 bits represent 2 or 4 three- or four- value number instead of just 2 or 4 two- value (binary) number, differnet coding methods exists that code ternary and quaternary number values to sequences of binary bits so that when sequence is decoded one bit represents ternary or quaternary value instead of binary. Examples are. “BIN@ERN: binary-ternary compression data coding”, “Binary to binary encoded ternary (BET)” US. patent, “Arithmetic with binary encoded ternary numbers” Parhami 2013, “Self-determining binary representation of ternary list”. On quaternary numbers: “A survey of quaternary codes and their binary image” Özkaya 2009, includes “Z4 Cycle Code” among others, and “Formulation and of novel quaternary algebra” 2011, “Design of some quaternary combinational blocks using a new logic system” Jahangar 2009, “A cost effective technique for BLUTS to QLUTS in FPGAs”, “Arithmetic operation in multi-valued logic” Patel 2010, “Application on Galois field in VLSI using multi-valued logic” Sakhare 2013. Other: “Rotation symmetric boolean function a novel approach to ternary multiplication” Vidya 2012, " Arithmetic algorithms for ternary number systems " Das 2012, “Addition and multiplication in generalized Tribonacci base” Ambroz 2007, “Bitwise gate grouping algorithm for mixed radix conversion”, “Ternary and quaternary logic to binary bit conversion Mosfets”, “2L threshold circuit for binary-quaternary encoding and decoding”, “Balances and abelinian complexity of certain class of ternary words” Turek (internet blog), Design of 8 bit array multiplier based on ternary logic QDGFET 2014. Other: " Coder compressor for ultra-large instruction width coarse grain reconfigurable systems", “Practical Lock Freedom: efficient and practical non-blocking data structures” Sundel 2014 (Synthesis OS Alexia Massalin, a some sort of distributed operating system), “Differential predictive floating-point analog-to-digital converter” Croza 2003, “Charger balanced analogue to digital digital converter using cyclic conversion”, “Abelinian complexity in minimal subshifts” Saari 2011, “Colour dither with n-best algorithm” Lemström, and for using complex numbers: researchgate.net: “Alternative numbers system bases?” (Rob Graigen) is new 2+i base, an alternative for 1+i complex base for computer arithmetic.