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Using floating point numbers as information storage and data compression

If any number presentation or any number system has much higher precision than usual integer binary presentation (where 2 bits is written as 2 bits and 8 bits written as 8 bits), That other than usual integer number system can be used as “information storage container”. For example floating point numbers: their maximum precision is used only for some accurate scientific computing that requires high precision. But more precision means more bits (in two s complement), and the more bits number can represent (accuracy) means that more information number can store in these bits. That information that is in this large two s complement bitstream of floating point (mantissa) number can be any information that is represented in bits, not just end result of some large scientific calcutation. Instead of putting integer bits in a row (for example 8bits + 8 bits + 8 bits) these can be “piled on top of each other” in very large two s complement number (8 bits + 8 bits = 216 (two s complement 16 bits), 8bits + 8 bits + 8bits = 224 (two s complement 24 bits) etc. I know this is computationally overcomplicated way to represent numbers but optical computing and quantum computing is coming and can make fast computations in no time. The more accuracy floating point number has (more mantissa bits) , the more information storing capacity the number has. In text “Algorithms for quad-double precision floating-point arithmetic” ( Y. Hida ) is on last page that using Shewchuk algorithm improved by S. Boldo (Sterbenz s theorem / Malcom improvement) floating point numbers precision can be improved to 2000 bits using 39 operations (iterations?). If mantissa bits of for example 80 bit Intel FP number (mantissa is 64 bits) is expanded 39 times (39 x 64 bits) result is about 2500 bits precision. More bits means more information can be stored inside floating point number, in this case 80 bit number can hold 2500 bits of information, with a range of 16384 bits (exponent range of floating point number, that is in fact 16383 or 16382 bits). That is much more, 31 times more accuracy and 200 times more range than usual integer number presentation of 80 bits with 80 bit accuracy and 80 bit number range. That information stored inside floating point number can be text, audio or video quantized as bits. Because 2000 bits or more is too much to represent one pixel of picture or herz of sound or text block, chaining bits together in one large number (for example 8 bits + 8 bits +8 bits etc.) each 8 bit value on top of each other (8 bits + 8 bits =16 bits, 8+8+8 bits is 24 bits together etc.) until some 2000 bits is full (250 x 8 bits) and then putting this bitchain inside floating point number. One floating point number now has 250 pixel or herz information or 250 text characters. 80 bit Intel FP number has range of 16384 bit values. So now we can use 32 iterations (32 x 64), result is 2048 bits precesion. Now this 2048 bits can be divided down to just one bit separate values and chain them “on top of each other” (1 bit + 1 bit +1 bit etc.) until 2048 bits is full. Each 1 bit value now has range of 8 bits (16384 : 2048 = 8). 8 bits is 256 in decimal system. This 1 bit value of 8 bit range can be text character (one letter in the 256 available letters and numbers), one pixel of picture (that pixel has 256 values) or herz in sound (8 bit dynamic range). So instead of one pixel or herz in sound or text character this one 80 bit floating point number now has 2048 different 1 bit pixels or herz or text with with 8 bit range, and this one 80 bit number can contain all those 2048 1 bit values with 8 bit range together. Storing information 8 bit precision x 2048 = 16384 bits. So instead of using 16384 bits for storing information now only one 80 bit floating point number is needed to contain same amount of information. Actually 80 bit floating point number has exponent range of 16383 or 16382 bits, not 16384 bits. This information storage even does not use data compression, so data compression methods that scrutinise information even more can be applied also together with this floating point information storage format. Logarithmic number systems, if they have similar properties (accuracy), can be used also as this kind of information storage. There are many kinds experimental logarithmic, semi-logarithmic, complex base logarithmic, etc. number systems. Complex base number systems also, if they have similar accuracy, can be used similar way as floating point numbers in information storage. Integer numbers can also be used to store information but they must now be converted to use more precision than they have in bit 2-value format. For example Zero Displacement Ternary (ZDTNS) is claiming to be most efficient number system. Similar, like “A new number system for faster multiplication” Hashemian 1996, signet- digit number (BS) canonical sign digit (CSD), exists. And “ternary Tau” number system (Stakhov 2002, Balanced Ternary Tau BTTS). In book “Lossless Compression Handbook” in section “Polynomial representation” Sayood writes on pages 56-78 that “order 3- tribonacci code” is the most economical way to represent numbers. Also “Tournament coding of integer sequences” Teuhola 2007. If integer processors have 56 bits as maximum, we can now make super long integer 63 x 56bit = 3528 bits, that long integer is divided by 3, so ternary can be represented as binary using simply conversion (3 bits to 2 ternary trits, 3528 bits becomes 2352 trits). If accuracy of these ternary numbers expands exponentially compared to ordinary binary system as number becomes larger, finally accuracy of this non-binary number is perhaps millions times more than ordinary binary number in 63 x 56bit = 3528 bit long super long ternary number. If some other integer system offers exponentially expanded accurary compared to ordinary binary integer it can be used in super long (thousands of bits) integer whose accuracy is much higher than ordinary binary nteger of thousands of bits long. If binary information is put “bits on top each other” like in floating point number, and then encode this binary to long non-binary number as ternary or complex base, and when information is decoded process is repeated otherway around. There are methods to encode ternary or even quaternary “bits” (or trits or quarts) to ordinary 2-value bits so that one bit equals to 3-value trit or 4-value quaternary, but how these coding methods work on these more complex ternary numbers systems I dont know. Using complex number bases as information storage like "alternative number formats" Munafo PT system, or even "infinity computer" ( Y ad Sergeyiev) or Wolfgang Matthess REAL computer algebra or J. A. W. Andersons Perspex Machine or ideas of Oswaldo Cadenas about complex/ real numbers, accuracy of single number perhaps comes close to infinity, and possibilities to store information as chain of bits etc. inside this one single number also. And multiple base number systems (Dimitrov), "The shifted number system for fast linear algebra on integer matrices", "Adapted modular number system" AMNS, Paul Taraus “bihereditary numbers” at Paul Tarau s homepage, "Weighted bit-set encodings for reduntant digit sets: theory" 2001, "A reduntant digit floating point system" Fahmy 2003, "Efficient binary-to-CSD encoder using bypass signal", "Performing arithmetic operations on round-to-nearest representations" Kornerup 2009, "New formats for computing with real numbers" Hermigo 2015, "Canonical Booth encoding", "Constrained triple-base number system", "Fast modular exponentiation of large numbers", "Radix-2r arithmetic by multiplication by constant", "Asymmetric high-radix signet-digit number systems for carry-free addition", "Numbers as streams of digits" C. Froygny 2012, "ZOT-binary: a new number sytem with an application on big-integer multiplication", and lastly "Dynamical directions in numeration" Barat, and "Optimal left-to-right binary signed digit recoding" Joye 2000, are options also. This floating point example was largest possible (80 bit) floating point number, but on smaller scale for example 10 bit OpenGL format floating point number (5 bit exponent and 5 bit mantissa) can be expanded accuracy. If 5 bit mantissa is expanded 39 times it becomes 195 bits. 192 bits is 24 x 8, so one 10 bit floating point number can replace 24 ordinary 8 bit numbers. The problem is that range is not expanding with those accuracy / mantissa expandind algorithms. So algorithm that expands exponent also and not just mantissa is perhaps needed to very small floating point numbers, or use very large exponent but small mantissa. Different doubling algorithms that make double or quadruple precision floating point out of single precision exists, such as "Representing numeric data in 32 bit while preserving 64 bit accuracy" Neal 2015, NTL:quad float, "Twofold fast summation " Latkin 2014, "Extented precision floating-point numbers for GPU computatation", "Vectorization of multibyte floating point data formats" 2016. And new and imprived floating point formats that use IEEE standard FP fomat but extended accyracy versions, such as Unum / Ubox number concept by John Gustafsson, and Altera / Intel "Floating point adder design flow" by Michael Parker 2011 that increases FP computation efficiency signifigantly. And methods that use non-standard FP formats such as article "Between fixed and floating point by dr. Gary Ray" and its table 4 alternative floating point formats. So it is possible perhaps improve further still this about 2000 bits (64 bits X 32 iterations) precision in 80 bit number principle. Some processors like Intel Xeon uses 256 and 512 bit floating point units, new AMD processors use 512 FP units also, and all these are based on Elbrus 512 bit FPU from which Intel bought patents and licence deal. Altough those are not real 512 or 256 bit FP processors, but chained 4 x 64 bit and 8 x 64 bit, they at least in some extent can operate 256 and 512 bit floating point values if needed. Perhaps they then expand even more efficiency of precision than 32 or 39 max. operations / iterations of 64 or 80 bit number, or at least faster processing if 32 - 39 iterations is used. Altough this kind of storing several number values inside one floating point number "on top of each other" saves bit rate, it is computationally extremely heavy and complicated solution compared to than just using separate 8 bit vales in signal processing. But every year processors becomes faster, and soon optical computing is coming and increases computation speed even more. Even fatser is quantum computing. So altough computationally heavy solution for data rate reduction and "compression" (altough no data compression is used, information is just presented in different form as one floating point number and not as integer separate line of bits values, so data compression methods can be used with this and compress information even further) in the future or already now, this several integer values inside one floating point number can be a method for economical storing of information. If is compared range of 16383 bits to 80 bits, "compression" ratio is about 1 : 205, or only 0,5% of bits is now needed if that information is put inside floating point number instead of long stream of integers, and if accuracy of 2496 bits is compared to 80 bits, 31 to1 is the compression ratio. Other texts: "Circuit which performs split precision, signed/unsigned, fixed and floating point, real and complex multiplication", and "A new uncertainity-bearing floating-point arithmetic" 2012. And if complex number bases are used or ternary, quaternary or even pentanary (5-value) number systems, then those "numbers" would not be traditional numbers at all but such symbols that for example APL programming language uses, one "number" can now be vector, matrix, equation (instead of quaternary number can be quaternion, a four-value equation) etc. That would increase information density and increase computation speed because instead of one bit that has integer value of 0 or 1, now there is a whole mathematical toolbox in one symbol (ternary, quaternary or pentanary value "number" that is some mathematical entity). There are "Index-calculus" number systems that use this idea, but in binary form, mainly logarithmic or other index-calculus number system. For ordinary integers are methods like "Furer theorem" or (Furer s theorem) and its developed versions that increase accuracy. For floating point there is "Herbie" automatical FP accuracy analysis system.For data compression there is "Method and device for encoding and decoding data in unique number values" by Ypo (Ipo) P.W.M.M. van den Boom. Van den Boom has invented Octasys Comp compression for cloud storage, and Octasys has won innovation award. And ODelta / direct ODelta method patent by Ossi Mikael Kalevo. "Dealing with large datasets (by throwing away most of the data)" by A. Heavens is "massive data compression". Chinese TransOS cloud OS is theoretical but available method for cloud OS. The iSpaces cloud browser / computer is multiple browser / multiuser solution also. For other data compression Finite State Entropy or Q-Digest and its versions perhaps are suitable. For text compression "Text compression and superfast searching" by O. Khurana 2005. It uses 16 bits, but if 8 bit values is used using IDBE (Intelligent Dictionary Based encoding) with 200 values of 256 available reserved for codebook and only 55 for text characters and numbers etc. and 56th is shift mark which opens another 8 bit (256 value) character table if 55 characters is not enough for some rare text marks. And using Kaufman -Klein "semi-lossless compression" for text. An example of using floating point number to store audio is 80 bit intel number: 24 khz sampling rate audio channels are piled "on top of each other", 24khz + 24khz = 48 khz, 4 X 24khz is 88 khz, etc. until 1024 channels is piled on top of each other (1024 X 24khz = 24,576 megaherz). This about 25 megaherz is close to TV system bandwith. This 24,5 megaherz can be divided to 1024 separate channels simply using frequency splitter in 24 khz intervals. Now 80 bit floating point number is used that has 1024 bit extented accuracy (16 iterations / operations of FP 64 bit mantissa extended range software) and 16384 bit range, this one floating point number can represent 1024 bits accuracy and 16383 bit range in 24,575 megaherz audio stream, divided to 24 khz channels (1024 X 24khz cannels together). Per one 24khz channel (of which there are 1024 together) floating point number has 1 bit accuracy and 16 bit range, so this 1 bit can (?) represent 16 bit value. This is the same (or is it? I dont know) accuracy as 16 bit integer audio stream. Now this 80 bit floating point number can represent 1024 different audio channels with 16 bit range / 1 bit accuracy per channel. So instead of representing audio 1024 X 16 bits = 16 384 bits integer audio stream there is just one 80 bit floating point number (if 1 bit accuracy and 16 bit range equals to 16 bit integer accuracy. If it does not, this does not affer similar accuracy as 16 bit integer). Bitrate savings are huge, 80 bit versus 16384 bits. And this even is not data a compression, numbers are just represented as floating point value and not as integer value. So different data compression methods can be installed and make bitrate even smaller. The same frequencies on top of each other / on long string after each other - principle can be used in pixels of picture and text characters perhaps also, piling them (bits of information) on top of each other / in long stream.

Trachtenberg speed system of mathematics is set of simple algorithms in decimal system that make possible even most complicated calcutations be done in very simple number shifting trics etc. and no actual calcutations is needed. Modern version of it is “Global number system: high speed number system for planet” by Jadhiav 2015. It has some improvemets to original and “modified Quine-Mcluskey method” included and indian Vedic mumber system additions. I have seen other indian texts of Vedic number system also. There are proposals that binary encoded decimal should be new integer standard on processors, such number systems as DEC64 (the proposed standard), or : “A decimal floating-point specification”, InterSystems $Decimal, $Double, and patent “System and method for converting from decimal floating point into scaled binary decimal”, and patent “Decomposition of decimal floating point data”. And “Clean arithmetic with decimal base and controlled precision” CADAC. In netpage is John G. Savards quasilogarithmic number system which is something like binary encoded decimal also. In netpage speleotrove .com are comprehensive lists of different binary encoded decimal number system studies. If binary encoded decimal is used, in integer form or other, perhaps then is possible to build arithmetic logic unit that uses modified Trachtenberg speed system of mathematics as means of calcutations. Because calculations now are simple number shifting tricks, these would speed up at least integer computations to extreme fast computing. And if it is not sensible using Trachtenberg system as hardware, at least in software form where program code directs those calcutations that can be done with Trachtenberg system to software based calcutations and those computations that are not suitable for Trachtenbetg system to direct hardware computing, if decimal number system is used. And earlier when floating point computers had not been yet manufactured, a method to increase integer math accuracy was called "floating vectors", perhaps a sort of vector math processing in integer form. It was used in old tube valve computers perhaps etc. It was invented by James H. Wilkinson who also made "iterative refinement" for computing. But I dont know if that old floating vectors -thing and iterative refinement are same thing or not. Anyway this floating vectors computation was a sort alternative way to increase accuracy of integer computing when floating point calcutations were not possible. After floating point computers came to use floating vectors integer computer calcutations were outdated. In integer processing perhaps this floating vector computation can increase accuracy if accuracy increase is needed.

Approximate computing is a way to keep transistor count low and processor simple, and at the same time speed up computing signicanly. Probabilistic computing or approximate computing uses inaccurate processor by nature, but that inaccuracy leads to huge savings in speed and complexity. Cheap processors that are low-end hardware and manufactured for example using printed electronics roll printing should be inaccurate because of simplicity. Even CPUs can be inaccurate, there exists error correction codes that can correct information even if 90% of it is wrong. So even inside CPU can be used inaccurate electronics if code is written with error correction codes. And outside CPU not even error correction is needed because low end lectronics and signal processing that is aimed to cheap devices has low quality audio and video etc. requirements anyway, and their video and audio codecs has low quality transmission rates so decreased quality of signal processing by inaccurate DSP does not matter. And neuromorphic processors that are coming even inside ordinary phones (Qualcomm Zeroth) use fuzzy logic and are by nature inaccurate computing based so neuromorphic can be inaccurate and accurate processors are waste of transistors for neuromorphic computing. Reversible computing is another idea for high efficiency computing but perhaps it requires major redesign in processors which use it. Taylor Alexander has proposed “Flutter”, a simplified and cheap rival technique for wireless comminication for WIFI replacement, that is cheap and simple. That is propably suitable for very simple and cheap internet devices such as cheap WIFI (or Flutter) phones. Chinese are using NGB (Next Generation Broadcasting standard) that is somewhat different from internet, and CMMB (Converted Mobile Multimedia Broadcasting ) format that have multicasting properties. In article “Giants, dwarfs and decentraliced alternatives to internet-based services:” 2015 are listed some strangely named P2P services such as Sladder, Delenk and Drizzle that are in between centralized and decentralized internet data transmission. Ted Nelson`s Xanadu project is finally ready to use, but no “alternative internet” has found widespread use. Australian G2TV net TV broadcasting company and Radeeus music streaming service are also examples of internet protocols that are not directly centraliced but not directly P2P networks either, but something in between. And french “” new generation P2P internet message service. Webinos is unified standard that has not gained widespread popularity, but for free internet for developing countries Webinos standard for all internet communication would be suitable. Google Web Intents and Mozilla Web Actvities were also aimed to simplify internet operations.

If error correction codes can restore information even if maximum 90% of it is destroyed, error correction codes themselves are a sort of “data compression”. Altough not as good as dedicated data compression formats, error correction in noisy signal conditions such as radio trequency transmission double as information compression also. If radio connection channel is noiseless bitrate can be reduced maximum to only 10% of original if error correction code is going to repair the result back to original. If channel becomes noisy some sort of header before encoded bit section gives information where the missing bits are in encoded bitchain. Using header that gives information of where the missing bits are makes possible to use variable bitrate, in less noisy channel minimum of 10% bits are needed and in noisy channel variable percent 70 - 10 % for example are needed to restore original bitchain. Header gives information how much bits are missing in encoded bitstream and also where the missing bits are. Error correction is used mainly as restore errors in the bitcahin, but when error correction is used in enviroment that is not noisy error correction codes can be used simulatneysly as data compression, delibarately removing bits from the bitchain if error correction can restore bitchain back to normal, now error correction can be used as data compression method also and no dedicated data compression method are needed. When bits are removed that makes “empty spaces” in the bitchain and not wrong bits that noisy channel makes in the bitchain. Because there is no wrong bits in the encoded bitchain but only places of those bits are left empty, and header gives exact information where those empty places in the bitchain are, and it is flexible encoding that can vary between 70 - 10% of original bitrate and bitrate can be optimized with header (that gives information) to maximum efficiency, error correction codes in some form can perhaps be used as data compression also and not just as error correction. When channel becomes noisy error correction codes revert to their original use as error correction method. So this is flexible error correction / data compression that can be used in noisy and non-noisy channel situations, and the error correction / data compression combination can be flexible combination that adapts itself to channel noise situations and finds optimal compromise between data correction and compression (where decoding system delibarately lefts out bits in the bitchain to shorten bitrate if that is possible). Another form of using error correction is to use very large number like Champernowne constant as information carrier. Using some large number like Champernowne number or other large number like Skew s number or Grahams number or other that can be calcutated by the computer, can be used so that no information such as text, picture etc. is actually transmitted. If Champernowne constant can include all the possible information of the universe in single number, that information just had to get out from that number. If error correction codes can restore information even if 90% of it has destroyed, now only is needed suitable bitstreams to be found in Champernowne constant or some else large that represent this information with 10% or more accuracy. Then this information, text or picture or sound, can be pulled out inside Champertowne constant. If text, picture or sound is encoded with error correction codes, and then from Champernowne constant is searched suitable bitsreams that represent this error coded information at least 10% accuracy. Encoded information can be divided small streams of bits then, similar to these small streams of bits are serched out of Champernowne constant wich resembles this information at least 10% accuracy. Error correction code restores information. No actual information is needed to information transfer, only coordinates of those small streams of bits that can be found inside Champernowne number. Coordinates can be the places in Champernowne constant (Champernowne constant is long stream of bits, so knowledge of the right places in this long bitsream, that are similar to encoded small bitstreams of information, is needed so that information can be pulled out from Champernowne constant), or simply just time that processor needs to calcutate some length of Champertnowne constant and this time information is used to find right places of information in Champernowne constant. So in order to transfer information, instead of sending text, picture or sound only error correction code enchanted coordinates how to sort out this information out from Champertowne constant is transmitted. If Champernowne constant can include itself all information in the world, it can be used as “data storage”, information just must get out of it in some way. And if error correction codes can restore information even when maximum 90% information is lost, suitable small bitstream blocks that contain information at least 10% accuracy can be easily found in Champernowne constant. So Champernowne constant itself can be used as data storage, only the right places where these small bitstream blocks are in huge Champertowne constant must be found, and when they are found information where they are inside Champernowne constant is only transmitted, not the information itself. The Champernowne constant itself is “information carrier” and its information storing capacity is endless. Or use some other large number, Graham s number, Skews number etc. as information storage. If some time information about how long processor takes time to calculate some length of Champernowne constant is stored and these calcutation time messages are just send as information transfer, the processor itself sorts out the actual information from Champertowne constant that it is calculating using timecodes, when some time of calculations has expired processor has reached the right place of Champernowne constant that contain the required information (in line of bits). Or if Champertowne constant is divided to small blocks of bits and now only a order- on- the line (bitblocks) number of specific bitblocks are transmitted, processor finds out specific information when it itself calcutates Champertowne constant to that length that is needed so that all bitblocks whose order on the line address code (from left to right lineof bits, and Champernowne constant is divided to small bitblocks and these have each own “address code” along Champernowne constant) are transmitted and are found in Champertowne constant. 80 bit floating point number can perhaps have 2500 bit precision and 16384 bit range. Precision is two s complement number, and possible different combinations of 2500 bits are 2*2500 (two s complement * 2500, or 2500 two s complement bits). 80 bit floating point number can have 2* 2500 different address codes where to find information in Champernowne constant, Skews number or Graham s number etc. If 2500 bits have 2*2500 different combinations and 80 bit floating point number can find them all, now 80 bit floating point number can now be used as finding 2500 bits of information in any order in some large number (Graham ´s number, Skews number, Champernowne constant etc.). Information storing capacity is 31 to 1 (2500 to 80). This is even more over- complicated way to store information than simply use floating point number as “piling bits on top of each other” principle. If error correction is used and that error correction has capacity to correct information if only about 17% of it is right and 83% wrong (2500 bit precision in 16000 bit range), range of 80 bit FP number can now be used and 16 000 bits can be used and information storing capacity is now 200 to 1, but because error correction codes use about 2,5 times more bits than without error correction, information storing capacity is only about 80 to 1 and not 200 to 1, and because error correction is data sorting, that worsenes data compression ratio because data compression is data sorting also. This method is super complicated way to store information but quantum computing and perhaps optical computing if it is fast enough can use it. But 2500 bit / 33 to 1 ratio does not use error correction and can be scrutinized even further using data compression techniques. Perhaps best way is to use timecode information, how much time procesor is spending calculating some large number, and when time code is accurate enough suitable bitchain in some large number can be found that matches information that is encoded, and now only time code of that time that processor needs to reach that place of bitchain in some large number is needed to be transmitted, not the bitchain itself. 80 bit floating point number has 2*2500 maximum precision, or two s complement with 2500 exponents. That is so enormously large number that timecode can find almost every possible bitchain in the world (some line of bits) in some large number. Even ordinary 80 bit number has 64 two s complement mantissa bits, or 16 million x million x million (in decimal numbers) accuracy, so timecode even without additional accuracy tricks is very huge and perhaps is enough for timecode, if error correction match bitchains are used that don t require 100% exact match of bitchain that is compared to bitchain of some large number, and then only timecode that processor needs to calculate some large number to that bitchain s place in that number is transmitted, not the bitchain itself. And if some errors are tolerated even after error correction has corrected information, but these errors that bitchain has after error correction don t make information unusable but just “lossy”, calculations can be made faster still when exact match is not needed. Third way to use error correction is to use bit plane coding, instead of of 2D bitplanes 3D bitplanes can be used, and now large streams of bits can be installed in large cube, for example 1024 X 1024 X 1024 bits. Now bits can be read inside this cube not just as left to right bitstream ,but up and down, sideways from X and Y axle, from corner to corner inside cube, and even using Splini and Bezier and Korch vectors inside cube. A single bit can be a a part of several bitsreams at once, error correction code corrects errors of bitstreams, and now one bit can be recycled and used in several streams of information at once, vectors of bits going forward , sideways, up and down , from backwards etc inside cubic bitplane. This is like finding pieces of information at Champernowne constant, but instead of having normal left to right written bitstream, bitsreams can now be in any direction inside 3D cubic bitplane, and instead of reading left to right bitstreams can now be read from backward to forward, from sideways, up or down, from corner to corner inside cube etc. If information is divided in suitable short bitstreams, and these small bitsreams are coded using efficient error correction, now these small bitstreams can be found not only in the some length of Champertowne constant but also inside cubic bitplane. If cubic bitplane has enough bits inside itself, almost any combination of bits can be found inside it, either in X- axle, in Y-axle from corner to corner line or even curved vector line (Bezier and Splini), now some computer program must just found these small bitsreams inside cubic bitplane, and give coordinates where to find them. Only coordinates are transmitted as information transfer, receiving device when having right coordinates just finds out the right places (bitstreams) inside 3D cubic bitplane that is inside receiving devices memory. If error correction can correct information if maximum of 90% of it is wrong, then only minimum of 10% of bitsreams bits are needed to be correct. Altough 90% error correction capacity is occasional situation and actual correction capacity of error correction is less than 90% in bitstreams, still error correction makes possible to “recycle” bits, a single bit can now be part of several bitstreams, one is going straight forward, second criss-crossing that one, third coming from up to down etc, and this one bit is in criss-cross of these all and is part of several information streams at once. So placing information in small error correction coded bitsreams and these bitstreams inside large cibic 3D bitplane, the cubic bitplane can now hold thousands of bitstreams that far outnumber the bit capacity of the cubic bitplane itself, because every bit inside this cubic bitplane can be “recycled” and used in several information carrying bitsreams at once. If curved vectors are used for bitstreams and not just straight lines, information store capacity is close to infinity in cubic bitplane. No actual information is needed to transfer, only “address code” of bit streams position inside cubic bitplane, the cubic bitplane itself can some standardised composition bits in for example 1024 X 1024 X 1024 formation, and this standardised cubic bitplane is inside every receiving and sendind device, but only "addrees code" of bitstreams inside this cubic bitplane is transmitted, not information inside of these bitstreams themselves. If long bitstream must be send, for example video stream etc, computer program cuts information in suitable length smaller bitsreams, adds error correction, then finds inside cubic bitplane bitsreams vectors (from forward, backward, sideways, up or down, curved vectors etc.) that match information to be send, and now sends only address codes that receiving device can find these bit patterns/ bit streams in its own cubic bitplane and then reperesent information. Error correction codes helps that information is not required to be 100% match, only accuracy that is enough to error correction to to correct is needed in bit patterns / bit streams. The long information stream can be cut several types of smaller streams, and these smaller streams can be in anywhere or every form inside cubic bitplane, in straight forward to bacward, but also from up to down, in curved bistream line if Bezier and Splini vectors are used, and even criss-crossing each other because "recycling" of bits is possible so one bit can be actually be part of several smaller bitsreams at once that are all part of large bitsream cut to small pieces. Bitstreams can also be not only straight line or curved, but in L-form making 90 degree turn in midway, or other geometrical shapes. And bitsreams can now be read from backward to forward, and same bitsream can be recycled like this way: one bistream starts, but second bitsream starts about 4-5 bits later, and is "inside" this first bistream, and when information between bitsreams became so different that error correction code cant fix it, this second bistream turns away in L-form from first one, so two bitsreams in some amount share the same bits and this bitstream is in fact two bitstreams at once before second bitstream takes L-turn. Almost infinite amount of information can now be encoded inside one limited space 3D bitplane, when different bitstreams are criss-crossing each one constantly and almost infinite way in different axles and positions, and bits inside cubic bitplane are part of several different criss-crossing bit streams at once. And cubic is not only form available, icosahedron or dodecahedron or other many-corner geometric form (polyhedra) can be used if that is possible, or even larger than three-dimensional “hypercube” in four-dimensional mathematical form, offering even more different ways to assemble bitstreams inside large many dimensional bitplane. Geometrical forms can be not only polyhedra, but complex polytype, Kepler -Poinsot type, “120 cell” type etc. These geometrical forms offer large number of vectors coming from different directions and different axels through bitplane, if bitplane is not a 2D plane or 3D cube but some complicated geometrical form. If only “address” of bitstreams are transmitted instead of bitstreams itself, savings in information transmission capacity is achivied. This address is bitstreams position in bitplane (X- and Y- axle, from corner to corner or from backward to forward) and bitstream shape code (straight, curved, or L-form etc.). Error correction can correct mistakes if some bit stream form found inside 3D bitplane does not match perfectly the information that is transmitted, but at some percentage match is found and error correction code can fix information to original. 3D bitplanes must be standardised in every device, or if some special case needs it, also perhaps 3D bitplane must be transmitted before information transmission (sending address codes) starts. Limited amount of bits in bitplane can now contain almost indefinitely amount of information, because the bitplane now has so many axles that can be used to divide bitplane that as single bit can have over 100 different directions that bitstream “go through” that bit and one bit can be a part of over 100 different bitstreams simultaneysly. That offers large amount of possible bitsream combinations inside bitplane and now almost any possible short bitstream combination (the line of 0 s and 1s in the short bitsream) can be found somewhere in the 3D bitmap. When the bitsream is error coded errors can be tolerated and no exact match of bits are needed. For example when some information (line of bits) is encoded into standardized 3D bitplane, first it is cut to suitable length short streams that are error correction coded, then from the bitplane must be found suitable places that have same line of bits than those bitstreams are at that accuracy that is needed to error correction to work properly, and then only “address code” or the place of these bitsreams inside 3D bitplane is needed to be transmitted, receiving device searches its own standard 3D bitplane the places of bitstreams inside according to “address codes” it has received, and then decodes the information using error correction. Different curved vectors like Korch, Splini and Bezier curves can be used instead of straight line or L-form for bitsreams, like “L-system tutorial” shows.

Texas instruments Omniview was old 3D video representing technology that does not require special glasses and can be viewed at large angle. However it has been forgotten like its another version “Felix 3D Display: interactive tool for volumetric imaging” (Langhans). These belong to “volumetric display” class of 3D displays, they were “Swept volume” versions but Langhans also shows “Static volumetric display”. Another forgotten feature is “Sheet RAM” or SHRAM memory, by Richard Lienau, a class of magnetic memory. That promised replacing both hard disk and DRAM memory by one single fast SHRAM memory device. These two innovations have not been developed further or gained widespread publicity, for some reason or other. I don`t know was there something wrong with them or what was the reason that they never gained attention.

Previous examples use only floating point numbers, and altough accuracy of those can be improved even further using unum concept (AMD), or “floating point adder design flow” (Altera), Gary Ray s model ("Between fixed and floating point by dr: Gary Ray") etc, some more exotic number systems can offer even more accuracy and so even more number (information) storing capacity. There are logarithmic and complex base numbers but floating point has become standard, and ALUs and processors that use logarithmic number systems or residue / reduntant number systems ("one hot residue number system"), or real /complex base number systems have remained at research state only and no commercial products using these have published. Altough storing information other ways than simple line of integer bits makes processor slow because it has to do sophisticated calcuatations, computers became faster each year and when quantum computing and optical computing becomes reality, perhaps storing information not as integer bits but some number system form that has high accuracy using few bits (and high accuracy means more bits that can store information, any information, not just calculation result of some high accuracy scientific computing). so instead of rerly used scientific computing numbers accuracy is used to maximum to store all kindsds of information, and if floating point number can have in 80 bits 2500 bit precision and 16 000 bit range, that ability can be exploited as information storage, and other number systems than just plain integers can be used as “information storage containrs”. And because that is not data compression, information is just stored in different number format than integers, different data compression methods can be applied after this from integer to other number system conversion and make data rates even smaller still. Some more exotic number systems are not just those mentioned before, but also “lazy number systems”, “segmented number systems”, “combinatorial number systems”, “mixed-radix number systems”, and index-calculus, hyperreal/ surreal numbers etc. There is a book by Petr Kurka: " Dynamics of number systems: computation with arbitrary precision" (2016) which is perhaps state- of- the- art of this matter. On the book “Fun with algorithms: 5th international conference” 2010 is on page 158 “New number system” (skew binary that uses five symbols and skew weights). More from Elmary, Jensen, Katajainen: “Two skew - binary numeral systems and one application” , (magical skew number system and canonical skew). And the Finite State Entropy coder uses asymmetric numeral system (and finite state transducer is in Petr Kurka s book). And then there is Higher Order Logic (HOL), "Ordinals in HOL: transfinite arithemetic up to (and beyond)..." Norrish, "Towards efficient higher - order logic learning in first order datalog framework " Pahlavi, "Second order logic and set theory" Väänänen. More number systems: "Numeral representetations as purely data structures" Ivanovic 2002 (4 digit + invariant number system), "Hierarchical residue number systems" (HRNS) Tomczak. If binary base is abondaned and instead ternary, quaternary or pentanary base numbers are used, those numbers themselves are coming close to "combinatorial logic" computer systems and one number or symbol can now be something like APL or J computer language symbols, one (number) symbol is in itself a matrix, index or some other sophisticated mathematical entity, not just 0 or 1 like in binary system. If ternary, quaternary or penatanary base is used number symbols can be more varied and different encoding methods that scrutinize 3 value ternary and 4 value quaternary number to just ordinary 2 value bit have been published. " Arithmetic operation in multi-valued logic" 2010 Patel, "Application on Galois field in VLSI using multi-valued logic" Sakharev 2013, "A cost effective for making BLUTs to QLUTs in FPGAs", "Arithmetic algorithms of ternary number system" S. Das 2012, "A novel approach to ternary multiplication" B.V.S. Vidya 2012, "Addition and multiplication of beta-expansion in generalized tribonacci base" Ambroz, Masakova, Pelantova 2007, "Balances and abelinian complexity of certain ternary words" Turek, "Self-determing binary representation of ternary list", "Formulation and developing of novel quaternary algebra" 2011, "New quaternary number design of some quaternary combinatorial blocks using new logical system", "Design of high performance quaternary adders", "A survey of quaternary codes and their binary image" Derya Özkaya 2009, "Bitwise gate grouping algorithm for mixed radix conversion", "Ternary and quaternary logic to binary conversion CMOS...", "BIN@ERN: binary-ternary compression data coding", "Binary to binary encoded ternary BET", "Quaternary encoding of dynamic XML data" 2006, "Real-life applications of soft computing... unary encodig, quaternary encoding", "Database and systems applications 2012: the SCOOTER labeling scheme" pages 27-29. There is netpage "Algorithms based on number base systems? (closed) " discussion 18.3 2011, including "meta-base enumeration n-tuple framework", and at "Data structures - what is good binary encoding for phi- based balanced ternary algorithms?" 20.7 2012. At there is "metallic number systems", and at alternative number system bases, at "Alternative number system bases?" (Rob Graigen) base 2+i number system instead of 1+i, and "Greedy and lazy representations of numbers in negative base system (Tom Hejda 2013). In "Research proposal: design of low power IEEE 754 compliant arithmetic operator ip for mobile application" is listed different floating point systems. Other texts: "Arithmetic units for a high performance digital signal processor" Lai 2004, "Differential predictive floating point analog- to - digital converter" (Croza, Dzeroz 2003), "Image compression by economical quaternary reaching method", "Guided quaternary method for wavelet - based image compression", "Design of low power multiplier with efficient full adder coding DPTAAL", "Pseudoternary coding" (Matti Pietikäinen), "Abelian complexity in minimal subshifts" 2009. Different data compression methods are byte pair encoding, morphing match chain, FSE (finite state entropy), VSEncoding (vector of splits encoding) Varchar, CONCISE N, Q-digest etc. Others: "Compressing 16 bit data using predictor values", "The algorithm and circuit design 400mhz 16 bit hybrid multiplier", "Sabrewing processor", "Towards an implementation of computer algebra system in functional language" Lobachev, "SINGULAR computer algebra system", "A field theory motivated approach to symbolic algebra" Peeters, "Design of ternary logic 8 bit array multiplier based on QDFET", "GRFPU - high performance IEEE-754 floating point unit", "A novel implementation of radix - 4 floating point-division/square-root using comparison multiples", "Charge-balanced floating-point analog-to-digital converter using cyclic conversion", "Simplified floating point division and square root" 2011. And perhaps more importantly Paul Tarau and his ideas of "hereditary numbers systems", "compressed number representations", and "giant numbers", "tree-based numbering systems". For example Taraus texts are “Arithmetic algorithms and applications of hereditarily binary numbers”, “Bijective Goedel numbers”, “Arithmetic operations with tree-based natural and rational numbers”, “A generic numbering system based on catalan families of combinatorial objects”, “A declarative specification of giant number arithmetic”, “the arithmetic of recursively run- length compressed natural numbers”. The more number has accuracy, the accuracy means more bits, and more bits means more information can be stored (in bits) of that number. For example chaining together 8 or 16 bit information blocks (one pixel of picture, herz of sound or text character) and put this long bitchain in some super-accurate numbering systems number. If accuracy of some unorthodox number system has for example 1000 (binary) bits and for example that accuracy is achivied using 10 or 20 (binary) bits, information can now be chained (8 bit + 8 bit + 8 bit etc. until 125 X 8 bit = 1000 bits is full). Now 125 pieces of 8 bit information can be put inside number that has accuracy of 1000 binary bits but this number can be represented in just 10 or 20 bits etc. because it uses some super- accurate numbering system, “compression ratio” is enormous and because no data compression is used, numbers are just represented in different form than binary integers, data compression can be used and put information density even further. In my previous examples I used floating point number as “information storage container”, and mantissa bits as information storage, but other numbering systems if they are more effective (more accurate and easier to calculate) can be used also, including different exotic number systems.

Another way to increase information density is: if for example some number system has in 80 bits 1000 bits accuracy, now this 1000 bits available can be divided to 12 X 80 bits sections, and these 80 bit sections are ANOTHER 80 bit number with 1000 bits accuracy. Now one 80 bit number includes itself 12 other 80 bit numbers, all of which have 1000 bit accuracy (1000 bits of information storage). Now information storing capacity is 12 000 bits instead of 1000 bits or 80 if plain integer is used. For example 80 bit floating point number has maximum (mantissa) accuracy of 2496 bits if 39 operations / iterations of extended accuracy (39 X 64 mantissa bits) is used. If now for example 960 bits of that accuracy is used to store 12 X 80 bit ANOTHER floating point numbers, 80 bits with again high accuracy (thousands of bits), now this one 80 bit floating point number contains in itself 12 other 80 bit floating point numbers (in another layer that is stored in first layer of 80 bits and its extended precision). If these 12 other 80 bit FP numbers have extended accuracy also the combined bit count of mantissa accuracy is perhaps 20 000 bits or so. All from one 80 bit number. These 20 000 bits can be used to store information in integer form chained together / piled on top of each other (for example 8 + 8 + 8 bits = 224 bits) in mantissa accuracy. If same number system is used in different “layers” on top of each other (for example first 960 bits of 2496 bit accuracy of 80 bit floating point numbers are used to form 12 X other 80 bit FP numbers) accuracy worsenes quite rapidly. To prevent this for example only 960 bits of most accurate precision of 2496 bits available is used to form second layer of floating point numbers, rest of some 1500 bits can be used if needed to store information in integer form “bits piled on top of each other”(for example 8 + 8 to form 216 bits etc.). The rest of information is contained in 12 X 80 bit floating point numbers inside 960 most accurate bits of first floating point number. The 12 X 1000 - 2000 bits of accuracy (accuracy of second layer is worse than first one because inaccuracy becomes cumalative when second layer of floating point numbers is put inside first layer) combined 12 000 - 24 000 bits is used to store information, and in this second layer actual information is (in chained integer form 8 + 8 + 8… bits for example that makes large two s comlement 21000 number, this large 21000 number when decoded can be divided back again to 28 + 28 + 28 bit sections). There are 12 80 bit floating point numbers inside first 960 bits of one single 80 bit floating point number of extended precision, each of these 12 FP numbers have extended precision also, but worser than the first one because cumulatve inaccuracy. The information is in integer form bits chained together / piled together in very large two s complement numbers 2 1000 - 2* 2000 (X 12). Some strange floating point formats can be made, for example using 10 bit OpenGL floating point numbers (249 X 10 bits = 2490bits ) inside one 80 bit floating point number, or 16 or 32 bit FP or 64 or 80 bit ordinary floating point numbers (without extended precision max. 39 operations) in second layer of one 80 bit floating point number. Using only mantissa bits of second layer numbers (for example 89 X 23 bits of 32 bit floating point numbers = 2047 bits, now 89 X 32 bit floating point numbers can be stored in one 80 bit, but these 89 have now common exponent field of just one 80 bit floating point (the one first base FP) number, or divided that to 89 values- 16383: 89= 184 bit exponent range (exponent bias). Actual exponent range (exponent bias) of 80 bit floating point number is 16383 or 16382 bits not 16384 as in my previous posts. In my first example only mantissa accuracy is used to store information, so only increased mantissa accuracy to 2496 bits is used as information storage, because mantissa accuracy is accuracy of the whole floating point number. Now combined number have two different exponents, the one in 80 bit FP number in second layer (64 bit mantissa + 15 bit exponent, there are 12 of these numbers inside first one similar number, stored in 960 most precise mantissa accuracy bits of extended precision of the base FP number) and also simultaneusly first base (first layer) 80 bit number exponent field (15 bits for exponents that is shared between 12 second layer FP numbers) is in use simultaneysly. So some strange floating point range values are possible. Apart from making strange floating point formats, to go step further from that is to use some other number system inside another, for example (this is just an example) if base is 80 bit floating point number with 1000 bit accuracy, now these 1000 bits are divided to 80 bit sections, those 80 bit sections are now for example Zero Displacement Ternary number system with 1000 bits of accuracy, 12 of which are included in one 1000 bit precision floating point number. On top of that yet another level is added, 12 X 80 bit bihereditary numbers inside 1000 bit accuracy ZTDNS number, and after this third layer perhaps “giant number number system” or other etc. (magical skew number system or Munafo PT number system at etc.) This can go on and on and add different number systems layered “on top of each other” (inside each other) as long as different number systems can be exploited until no suitable number systems are no more or accuracy and range limits have been reached. In every number system layer added “inside ach other” accuracy worsenes (because cumulative errors) until its no sensible to add another level anymore. If this “number systems/ numbers inside each other” procedure is used four times (12 X 12 X 12 X 12 X 1000 bit accuracy) result is 20,7 million bits of information or 2,6 megabytes if 80 bits base and 1000 bits accuracy is the used (12 X 80 bits). All inside one single 80 bit number. Information compression capacity is 260 000 to 1, and no actual data compression is used, only representing numbers in different number systems instead of integers. So instead of 80 bit integer used in information storage the number can be 80 bit four different number systems / inside each others number systems 12 X 80 bit numbers in every successive layer (in my example) + the one single 80 bit base number from which everything starts. Only the last stage has the actual information coded as integers in two s complement form (if floating point number system is used, if not, something that reminds two s complement is used, if ternary number system is used three s complement instead of twos complement is used etc. Main point is that large chain of integers for example 8 bit + 8 bit + 8 bit etc. can be represented as some large super accurate number, the accuracy is measured in bits like binary computer arithmetic does altough the actual number system can be non-binary, and this super-accuracy can be used as information storage and “compression”, if number can for example in 80 bits represent thousands of bits accuracy, this is huge “information compression” capacity) in huge 21000 two s complement number (or other similar) that can be divided down to small 28 + 28 +28 etc. sections (to reach actual 8 bit + 8 bit +8 bit bitchain), so to reach that information huge amount of decoding (four different number systems/ four different layers, 12 80 bit numbers of extended precision of perhaps 1000 bits of accuracy in two s complement form inside each one of these 80 bit numbers in every layer) must be done but optical and quantum computers are fast. Some kind of “address book” in the section that decoder decodes first must contain list of what information is where so that innecessary calcutations can be avoided if right place of different information in this long bitchain of information / four different layers of four number systems (of which only last layer contain the actual information) is known. If accuracy is greater than 1000 bits but not enough for second layer of some number system, information can be put as simple integers as two s complement form in inaccurate “aft section” of different number systems (that are after 960 bits needed to store 12 X 80 bit second layer) and increase information capacity still, if accuracy is greater than 960 bits but not so accurate that another layer is worth while to be used in this aft section that follows 960 bits (in my example 80 bit floating point number only first 960 bits of total 2496 bits accuracy is used to second layer) . Changing number systems between layers (putting different numbers systems inside each other) perhaps increases accuracy because if using same number system on and on in different layers “inside itself” makes cumulative errors that repeat itself on and on. Accurary worsenes inevitaby no matter what number system is used “inside each other”, but changing number systems between layers makes errors going in different places and not so cumulative. This kind of super dense information packing can be used in space probe transmission or satellite communication etc. or in every use that needs small bitrate data transmission and storage. Only very accurate number systems must be found and put to use that have 1000 bits or more accuracy (“extended precision”) using only 80 or so bits. Also worsening of accuracy (cumuative mistakes of calcutations) should be as small as possibe in these number systems so this kind of “numbers inside each other” information storage can be true. If floating point number systems are not suitable for this kind of “numbers inside each other” type thing because of bad accuracy, perhaps other number systems are accurate enough. And what are the best number systems for different layers (base layer one single number, 12 numbers or more in second layer, 12 (X12= 144 numbers ) or more in third layer etc. What are best number systems for each layer I don t know, and I just used as an example 80 bit (floating point and other types of) number, the actual number (or numbers, if different number systems are used in different layers, their bit count and other things can change between layers) can have other bit count, smaller or bigger than 80 bits. And if “infinity computer” principle offers some number system that has (almost) infinite accuracy it should be used. Almost infinite accuracy of the number means that the number in question has almost infinite capacity to store information in itself. Different systems have been proposed by Yaroslav D. Sergeyev, James A.D.W Anderson (Perspex machine), Wolfgang Matthes (REAL computer architechture) and Oswaldo Cadenas. There is “base infinity number system” by Eric James Parfitt, at is “Number theory - Can you have a numeral system with infinite digits?”, and article “Hyperreal structures arising from an infinite base logarithm” Lengyej 1996, “Ordinals in HOL” Norrish. If some super- hyper number system is used with almost infinite accuracy for example as base from which other laeyrs of number systems are piled on top (if layered number systems are even used if accuracy is close to infinity, only one number system is enough then). Then perhaps one 80 bit number (when this number is represented in binary bit form) can have gigabyte or terabyte accuracy when measured in bits (more accuracy means more information storing capacity), in just about 80 bits or so. So this super- hyper number can store inside its accuracy potential perhaps gigabyte or terabyte amount of information but number itself is only about 80 bits. 80 bit floating point number has theoretically 2496 bit accuracy (39 X 64 mantissa bits when extended precision is used), some other sophisticated number system could have much better accuracy potential, and much better information storing capacity, because more accuracy means more bits, and more bits means more information can be stored in those accuracy bits. Main point is that multiple values can be grouped or chained together to form one large value, and this large value which includes perhaps hundreads of different smaller values encoded together is now descripted as accuracy of some number. When decoded this large value can be divided down to smaller (hundreads of) values. Now one number can include hundreads of smaller numbers. If that one big number is not an integer, but for example 80 bit floating point number, whose accuracy is 2496 bits, this 80 bit number can have 2496 bits of information (several hundreads smaller values chained together for 2496 bits). To go step further, this 2496 bit number can include itself (in its accuracy) 12 other 80 bit floating point numbers, that are stored in first 960 most accurate bits of 2496 bit precision. The actual information is in these 12 other 80 bit floating point numbers, again several hundread values chained to one large number in every 12 80 bit numbers. Available accuracy of these “second layer” 80 bit FP numbers are between 1500 and 2400 bits about, because “first layer” consumes 80 to 960 bits of 2496 bits of accuracy. Information density now expands exponentially, and if even more number layers are added (12 X 12 etc. on top of each other) megabyte of information is now included in one 80 bit number, but perhaps number system must be some other than floating point, some more accurate than floating point. Perhaps terabyte of information density is achieved using this “number systems inside each other / on top of each other” principles using only about 80 bits. And when the inaccurate “aft section” of numbers, for example accuracy from 960 to 2496 bits in floating point system is not used to store another 80 bit floating point numbers, this aft section can include in its precision information like 8 or 16 bit integers chained to about 1500 bits in 960 - 2496 bits section, so this inaccurate “aft section” that cannot be used as storing another 80 bit FP numbers can be used as information storing still, if needed. Piling information or chaining multiple values together is easy in audio recording, frequencies just are piled on top of each other, 20 khz channel + another 20 khz channel makes 40 khz, 3 X 20 khz channels makes 60 khz etc, and simple frequency splitter in 20 khz intervals divides the channels from each other. Now one megaherz includes 50 X 20 khz channels, and this megaherz is one number that includes itself 50 different 20 khz channels. This is simple “chaining several different values to one large value” principle applied in audio recording. This one megaherz can be descripted as one large binary number. I don t know if it is possible to use in video recording also. PAL TV format has 13,5 megaherz “pixel frequency” but if it is possible to build same kind of “several smaller values make one large value together” principle in video recording I don t know. So this 13,5 megaherz one large value includes all the pixels of about 700 X 600 TV video frame, and these 600 X 700 pixels are the smaller values that make one large 13,5 megaherz pixel value.

There are versions of improved accuracy floating point standard formats, such as adding two extra bits to “guard” bits or other, so instead of 80 bits FP number now it has 81 bits (because 80 bit floating point number actually uses only 79 bits). Newest increased accuracy format is unum concept. It can use ordinary standard floating point numbers but adds some extra number field (8 or 11 bits are examples used). So if there ever will be unum ALU processor it can use both standard and unum FP formats. There are non-standard improved floating point formats (tapered FP, Richey and Sayedian fractional format, and Gary Ray s “bit reversed Elias gamma exponent” model in “Between fixed and floating point by dr. Gary Ray”). The extra unum numbers of FP number are similar integers that floating point number system uses for mantissa and exponent. But because unum concept is all new, perhaps coding unum section using other than just integer form, for example logarithmic (4 bits is smallest usable logarithmic, 7 bits integer accuracy) or tapered, or fractional format, for example Bounded Integer Sequence Encoding BISE, or “Elias gamma coding”, or “multiple-base composite integer” (in “Alternative number systems” netpage) that gives more accuracy for unum section, altough rest of the floating point number is standard IEEE or Intel 80 bit. And using additional extended precision that is possible in standard FP number that increases mantissa accuracy 39 times: it is no good to use large floating point numbers because computations become over complicated. Better way than 80 bit floating point number is to use smallest possible FP number with smallest available mantissa, and then began increasing accuracy to max 39 times. Smallest “standard” FP number is OpenGl format 10 bit, 5 bit mantissa and 5 bit exponent. However, because the number is used as “information storage container” and several 8 or 16 bit or more integer values are chained together to form large two s complement number and that large two s complement number is the accuracy of the floating point number, in this case max accuracy is 195 bits (5 bits X 39), and this can be divided down to 24 X 8 bit values (=192 bits), also the (exponent) range of the number must be as large as possible because if floating point number is “information storage container” and maximum accuracy is the purpose, and in this case exponent range is divided between 24 8 bit numbers. So 5 bit exponent range is not perhaps enough for this kind of system. Ultimate solution is 5 bit mantissa 15 bit exponent (from Intel 80 bit number) floating point number, 20 bits total. So this is 80 bit FP number with only 5 mantissa bits. These 5 bits are expanded to 192 bit accuracy using 39 operations / iterations of extended precision. But also exponent field is largest possible because it has 15 bits. I don t know what is the actual range of this kind of FP number, I only guess it will be about 200 times of mantissa bits because 80 bit number has 200 times mantissa bit range. Propably the range is much less than 200 X 5 bits because this mantissa has only 5 bits, not 64 like in 80 bit number, but anyway largest possible that is available as 15 bit is largest possible exponent in floating point “standard” systems. Or using 11 bit exponent field of 64 bit number results 16 bit number (5 bit + 11 bits, 64 bit FP number with only 5 mantissa bits, but no sign bit because it would make 17 bit number). Now adding unum number extras to these, 20 bit FP number with 12 bit unum extra section is 32 bit, 16 bit FP with 8 extra unum bits is 24 bits. Without unum these are still in a way “standard” numbers because IEEE and Intel standard floating point system is used. Only unum section is added. Perhaps 16 bit (11bit exponent, 5 bit mantissa) expanded to 24 bits (1 bit sign bit, 7 bit unum section), and 26 bit (15 bit exponent, 10 bit mantissa, 1 sign bit) expanded to 32 bits (6 bit unum section) are best, they are related to standard floating point formats in some way (11 and 15 bit exponents of 64 bit and 80 bit standard FP numbers, 5 bit mantissa of of OpenGL number and 10 bit mantissa of 16 bit IEEE standard FP number ). Because 26 bit is odd bitwidth perhaps using OpenGL 14 bit number s 9 bit mantissa, 9 bits + 15 bit exponent is 24 bits, if sign bit and 7 bit unum section is added resut is 32 bit number. Accuracy of 9 bit mantissa expanded to 39 times is 351 bits. 352 bits is needed to divide it to 8 bit (44 X 8 = 352) or 16 bit (22 X 16 = 352) sections, but if simply 44th 8 bit section is 7 bit and 22th 16 bit section is 15 bit now 44 8 bit sections or 22 16 bit sections are fit in 351 bits, last section has slightly less accuracy as one bit is missing but all 351 bits can now be used and "compression ratio is 11 to 1 (351 : 32 = 11, 32 bit number has 9 bit mantissa, 15 bit exponent and 1 sign bit, 7 unum bits). All these FP formats are “related to each other” and can be used (?) in standard computer ALU, because they use “standard” floating point numbers. The OpenGL FP formats are based on standard floating point format (16 bit IEEE standard). The unum section is extra, but processor can skip it if needed. There are FPU processors that use 512 bit capacity (8 X 64 bits), or 256 bits (actually 4 X 64 bits, Intel Xeon, Elbrus and AMD Zen, that one uses 2 X 256 bit = 512 bit). The proposed 24 or 32 bit FP + unum can have 16 X 32bit FPU processors (=512 bit) or 24 X 24bit (= 576 bit) processors. So simultaneusly can 16 or 24 those numbers be decoded or coded in single FP unit of processor. If the unum section is used only for giving extra information and not participate in the calculation process, then for example if 64 bit bit FP number has 16 bit long unum section, floating point ALU can now be 8 X 80 bit = 640 bit wide and still have almost same transistor count and calculation speed as ordinary 512 bit 8 X 64 bit FP unit, if unum bits do not participate in actual floating point calculation process. And similarly if unum bits of 16 bit floating point + 8 bit unum section or 24 bit floating point + 8 bit unum section, floating point unit does the FP calculation only and unum just gives extra information (range etc.) now floating point unit can be 32 X 24 bit or 24 X 32 bit wide, because FP unit only needs 16 bits of 24 bit number and 24 bits of 32 bit number to do actual calculations. Sign bit is not included in 16 bit (5 bit mantissa + 11 bit exponent) or 24 bit (9 bit mantissa + 15 bit exponent) because there is no room for it in 16 or 24 bits, but sign bit can be included in the unum section, restricting unum section from 8 bits to 7 bits. Mantissa is always expanded using 39 times or less expansion. Less expansion means 1 - 39 X flexible extented precision. if 5 bits is in mantissa, 192 bits is the accuracy (actually max 195 bits), and whole number 24 bit wide, “compression ratio” is 8 to 1. If 10 bit mantissa is of 16 bit FP number is used, expanded to 384 bit (390 bit max) accuracy, and whole number is 32 bits, compression ratio is 12 to 1. No actual data compression is used and can be used after this and reduce bitrate even further. Accuracy is flexible between 1 X mantissa accuracy (no extended precision) and 39 X mantissa accuracy (maximum precision) so this floating point number system is very flexible and calculation speed / information compression trade off can be changed among to application. Using 5 or 9 or 10 bit mantissa makes calculations much faster than using 53 or 64 bit mantissa, altough large FP numbers have greater exponent range and more information compression capacity because exponent bits don t require so much space in them. Large exponent is needed because this system that expands mantissa accuracy does not expand exponent field. If unum section or exponent section can be made smaller, information compression capacity is greater. Another way is not to use standard floating point but some other FP numbers system, in the netpage “Floating point formats” are 8 bit formats by George Spelvin that has very large range but very small accuracy, and smallest floating point format is 5 bits. Somewhere I got the mention that in Berkeley university 13 bit floating point number system is developed that needs only 13 bits but has the range and accuracy of standard 32 bit floating point number. if from that 13 bits are added 3 unum bits accuracy perhaps increases even more, and number now has 16 bits. There are several ways to increase floating point accuracy, for example Gal s accuracy tables and its french version “Gal s accuracy tables revisited”, but that increases accuracy only 10 bits. 10 bits added to 5 bit mantissa triples accuracy anyway and makes three times accuracy than original. If there is a way that increases exponent range also and not just mantissa accuracy in floating point system that would help to information compression capacity, in very small floating point numbers. If several number systems are put “inside each other” for example accuracy of 80 bit floating point number, mantissa expanded to 39 times (64 X 39 = 2496 bits) is used to store another layer of floating point numbers, and common exponent field is used, and minimum mantissa is 5 bits, now this one FP number in second layer can hold 499 separate 5bit (499 X 5 = 2495) mantissa bit bits that have common exponent field and 16383 bit common exponent range. So the one 80 bit FP number has 499 different values that have 5 bit mantissa and 32,8 bit avarage exponent range. That is fairly close to 16 bit floating point number which has 10 bit mantissa and 40 bit exponent range. But now 499 values can be stored in one 80 bit number instead using one 16 bit number. Compression ratio is 100 to 1 (80 : 16 = 5) with slightly less accuracy than in 16 bit and now one single 80 bit number can store 499 values (herz of sound or pixel of picture) instead that one 16 bit number is used to store one value only. The “second layer” of this kind of putting numbers inside each other principle “second layer” can be just integers not second layer of floating point numbers, now this is final layer where inormation is. But only when changing from floating point number systems to some exotic ultra- accurate number system this kind of “information storage container” comes to real effective. And when accuracy of the numbers are used to store several “layers” of numbers / number systems inside each other / piled on top of each other, then information storing and compression reaches exponential levels. If 8 or 16 bit integer is the actual information, these must just be chained together that many of them can be put inside some very accurate number, and the accuracy of the number is the “information carrier”. I used piling them to very large two s complement with 2*1000 or more two s complement exponents, because I don t know any other method that this high accuracy of some number systems can be used to store information with multiple values (hundreads or thousands different 8 or 16 bit integer values chained together inside the accuracy potential of some number system). If other numbers than integers numbers are “put inside each other / piled each other”, like one floating number contains several other floating point numbers in its accuracy, principle is still the same chaining bits together in big pile of two s complement or similar, and when decoded divided down to back in smaller sections. In netpage in “alternative number formats” is “multiple base composite integer”, “double- base number systems”, “level-index number system/ symmetric level index number system”, “Knuth s systems”. Because unum is new concept, that uses old standard floating point format, processors can be built to use old FP formats but when needed they can use extra unum section also if number includes it. This extra unum section can be decoded with high information density using aforementioned or “reversed bit Elias gamma coding” etc. But if unum section is encoded using data compression / data sorting then if this floating point number is compressed using data compression unum section would not be compressed effectively because it is already data compressed. The “compression ratio” mentioned before does not mean data compression, it only means information density. If floating point data compression (data sorting) is used compression ratio of information can be even better than 8 or 12 times mentioned before, because no actual data compression is used, only mantissa of the number is expanded and increased information density comes that way. And if multiple base composite integer is integer format, not floating point or similar, perhaps integer processor can use it. Integer processing is much faster than floating point, and integer processors have 56 bit max bitwidth. if FP processors have 8 X 64 = 512 bit ALUs integer ALUs can also be made 8 X 56 = 448bit wide, or even 16 X 56 = 896 bit wide if integer processing is simpler than floating point and faster. If information density of integer is expanding exponentially as number bitwidth becomes larger (in some sophisticated integer number format) 896 bit integer is the most information dense number, and largest that integer ALU can handle. If integer values are “multiple base composite integers” or other high information density integer format integer processing actually can be faster and more effective than floating point computation. If integer number formats have high information density, for example if 80 bit integer has accuracy of 300-, 500-, or 1000 bits (in “multiple base” or other sophisticated integer method), that kind of “putting different layers of numbers inside each other / on top of each other” that works in floating point and exotic number systems can work in integer format also and increase information density exponentially, like it does in floating point formats and in exotic number systems. “Integer” means that computations are as simple or almost as simple as typical max 56 bit integer processing in integer ALU, altough the actual number system may be different, but at least computations are not so difficult as in floating point ALU processor. If unum concept is used in floating point system, and 8 or 11 bits is required unum expansion in number, then 64 bit IEEE number has 72 (?) or 80 (?) bits with 8 or 16 bits unum extra bits. 80 bit intel FP number perhaps has 90 (?) bits (11 unum bits, 79 bits is used only in 80 bit Intel number) or 88 (?) bits if 9 unum bits are used. There is a book written by James W. Demmel: “Applied numeral linear algebra” 1997, in the pages 7 - 15 is floating point numbers representation and in the pages 223 - 227 “Löwner s theorem” applied to floating point non-standard systems such as Cray floating point format, that increases accuracy. In the text "On the multiplicative properties of modulo M of numbers with missing digits " 2007 Moschevitin is study of numbers with missing digits if some information of numbers is missing for example if lossy compression is used that makes inaccurate or missing information of numbers or line of digits. Those floating point numbers with large mantissa 53 or 64 bits are computationally expensive to expand 39 times larger, but optical computing is fast and quantum computing even faster. For mobile application (phone) perhaps small 5, 9 or 10 bit mantissa (that is expanded max to 39 times) is more suitable. AMD Zen has already 512 bit floating point processing capacity and it is for mobile applications (laptops), so superfast floating point computation is coming to mobile devices. Perhaps mobile phone can have 512 bit floating point processor or similar. If some super-accurate number system is used (other than floating point or integer) it needes special ALU, but optical computers and quantum computers anyway are very different than electric nowadays computers. If several number systems are used “top of each other” to increase exponentially information density, if one of them is “standard” or related to standard floating point number system, now programs that use standard floating point format can be used at least in one layer. If some super accurate number system is used, I don t know what is the computational speed of the processor if the number has for example megabyte or more accuracy measured in bits in just about 80 bits or so. Different “infinity computer” approaches are already being studied. Oswaldo Cadenas has patent WO2008078098A1 “Processing systems accepting exceptional numbers” and Cadenas has also “twos complement transreal coding” principle. There are many other “infinity computer” concepts. And if super- accurate number systems are “piled on top of each other” like floating point numbers when one 80 bit FP number with 2496 bit accuracy is used to form 12 other 80 bit floating point numbers in 960 first bits of one 80 bit FP number s accuracy, information density expands exponentially, and more layers can be added on top of each other until accuracy potential has worn off, in the last layer actual information is in long chain of integers or in similar form. If number system or number systems are accurate enough this different layers on top of each other can be repeated many times, more than 12 second layer 80 bit numbers can be put in the second layer (more than 960 bits of accuracy can be exploited), and in the end about 80 bits is enough to represent gigabyte or terabyte amount of information, if some sophisticated super accurate number system is used. But if at least one number layer is “standard” floating point (80 bits?) format processor can also use floating point standard numbers (and standard computer programs using these FP numbers) together with new super accurate number systems (in several layers) that boost information density to maximum. I used 80 bit as bitwidth only as an example, any suitable bitwidth will do, and if integer- only processing is used some super long integer (in my example it was 63 X 56 bit integer) that uses “multiple base composite integer” or other high information density integer number system, if integer accuracy expands exponentially compared to ordinary binary integer of the same bitwidth the more bits this sophisticated new integer format has, this integer could have thousands of bits and even integer processor could have thousands of times more accuracy than usual binary integer of the same bitwidth, and integer processing ALUs can be used in similar methods like floating point or super accurate other numbers systems, piling numbers on top of each other and in the last layer chaining several small values to one large value. When this complicated number system combination is decoded in receiving device different number layers must be decoded and only the final layer has the actual information, and it is chained as one large value that must be divided down and smaller values extracted from one large value, these smaller values are hertz in sound, pixel of picture, text character of text etc. Huge amount of encoding (in device that sends the 80 bit message) and decoding (in receiving device) must be done but information density is super dense, perhaps gigabyte or terabyte of information can be put inside only about 80 bits. Floating point and other processors are becoming faster and faster, and now this fast number crunching ability of modern processors can be used in information packing.

There are microcontroller processor architechturers that use 4 - 16 bit signal path so 24 bit or larger unum format is unsuitable for simple microcontrollers. But if there ever will be a 16 bit floating point unit in the microcontroller unum has a chance. OpenGL format has 10, 11 and 13 bits FP numbers, derived from 16 bit IEEE standard I presume, so making 16 bit unum floating point standard for microcontrollers is possible. If 10 bit OpenGL FPis used 6 extra bits (16 bits total) are for unum values and if 11 bit then 5 bits is left for unum. In the netpage in microfloats section also 8 bit floating point by George Spelvi that has large range but small accuracy. If 8 bit floating point format is expanded by 4 or 8 bit unum section result is 12 - 16 bit unum / floating point format, non-standard altough. Also 8 bit microcontrollers exist. In the microfloat section is mentioned 5 bit IBM keyboard scanning floating point format used in IBM computer keybords, that uses only 5 bits as floating point number. So combining this 5 bit FP to 3 bit unum section makes 8 bit unum / FP number, if that has any realistic use in microcontroller (requires that 8 bit microcontroller has floating point unit). Smallest microcontrollers are 4 bit only, and smallest useful logarithmic value is 4 bits, so instead of 4 bit integer if small 4 bit microcontrollers use logarithmic scale their precision is better. Also using dither in improving data accuracy, audio systems use dither in audio applications but using it to improve precision of other data also is useful in small 4 - 16 bit microcontrollers. Sony Super Bit Mapping added 6 bit accuracy to 16 bits integer precision in audio format (resulting 22 bit accuracy). There are other methods like “ExtraBit Mastering audio processor” (“Sonically improved noise shaping…”) etc. 4 - 8 bit microcontrollers benefit best from added dither. Up to 10 extra bit accuracy is achieved but dither noise becomes audible in the signal chain over 6 bits about. Because dither improves better low bitwitdth, it can be used in future manycore microcontrollers like XMOS xCore or Imsys future 1000 core CISC microcontroller. If microcontroller architechture is 4 - 16 or even 32 bit (integer) wide. There is a text “Generating dithering noise for maximum likelihood estimation from quantized data” (Gustafsson, Karlsson 2013). Increased simplicity of low bitwitdth and increased processing power of manycore microcontrollers may even challenge CPU manufacturers if very fast processing “microcontroller” with 1000 or so cores reaches CPU level data processing capacity. And for high performance floating point computation: MIPS R10000 and R18000 had different FP units than typical Intel / AMD. The MIPS FP unit was split into different functional sections, but otherwise used standard floating point number formats. These MIPS R10000, R18000 and perhaps proposed R20000 had FP units that were promised to be more effective than Intel / AMD of that time (late 1990s - early 2000s).

I don t know which is the best way to use accuracy of extented precision floating point number. If 80 bit FP number has 2496 bit accuracy (39 X 64 mantissa bits), which is the best way to divide it to “numbers on top of each other” concept? If 10 X 80 bits = 800 bits is used then one 80 bit number can be used as 10 X 10 X 10 = 1000 (800 bits + 800 bits + 800 bits = 2400 bits). “Compression ratio” is 1000 to 1, one thousand other 80 bit FP numbers can be included inside just one 80 bit FP number. But there are other ways: 7 X 320 bit + 1 X 240 bit = 2480 bit, (320 is 4 X 80 and that repeats seven times, and 240 is 3 X 80, so 47 X 3 = 49 000 something), now one 80 bit FP number can include 49 000 other 80 bit FP numbers. If simply 160bit (2 X 80 bit) is used for representing FP numbers result is now 15 X 160 bit = 2400 bits. 215 is 32 700 about, so one 80 bit floating point number can include about 33 000 other 80 bit floating point numbers in itself . This last layer, 49 000 or 33 000 floating point numbers is the layer where actual information is, other layers are used only for representetion of other floating point numbers and if needed, inaccurate “aft section” of floating point number that is not used in representation of other FP numbers can be used in some sort of information storage also. I don t know how much time computer use calculating this (this extented 39 X mantissa precision is calculated at software, not hardware, because no hardware system exists to calculate this "39 X “extented precision”) system, and what is the best way to arrange floating point numbers that computation is as fast as possible in this kind of “one floating point number represents several another floating point numbers” concept. No actual data compression is used, only floating point numbers are “piled on top of each other / inside each other”. But still “compression ratio” of 1000:1 to about 50 000:1 is achieved. Layers are three (800bit, 10 X 80), eight (7 X 320 in 4 X 80 plus 1 X 240 bit in 3 X 80), and fifteen ( 15 X 160 bit in 2 X 80). Is it more efficient to have large bitwidth and few layers, or small bitwidth but many layers, what is computationally efficient I don t know. And unum concept is not even included here, if it increases accuracy it increases efficiency still in this kind of “mathematical perpetum mobile” concept. But accuracy worsenes in each layer so it is not perpetum mobile but it must stop somewhere. However tens of thousands times “compression ratio” is achieved before accuracy worsenes to inacceptable levels. If some other number system is used than floating point / unum or then mixing different number systems in different layers would perhaps offer more accuracy, but makes this system even more complicated still. Anyway this is the way to “compress” information, not just floating point numbers, the last layer where information is can be any binary information, not just floating point numbers, if floating point / unum numbers are used as “compressing” information. Texts in the field and outside it: “Stochastic optimization of floating-point programs with tunable precision”, “On the maximum relative error when computing x in floating-point arithmetic”, “Design and implementation of complex floating point processor using FPGA”, “Encoding permutations as integers via the Lehmer code (Java script)”, “Profiling floating point value ranges for reconfigurable implementation” Brown 2012. And more: “RAIVE: runtime assessment of floating-point instability by vectorization”, “Variation-adaptive stockhastic computing organization VASCO”, “Accuracy configurable floating point multiplier for error tolerant applications”, “Auto-tuning of floating -point precision with discrete stochastic arithmetic”, “Deep learning with limited numerical precision”, "Algorithms with numbers " Vazirami, boost1.59.0 “Theory behind floating point comparisons”, “Robustness of numerical representations”.

I simply use same principle like using frequency splitter in sound, one 24 khz mono channel can be two 12 khz channels if simply frequency splitter is used. Now two s complement to 800 exponents (2800 in this notation what I use) is simply 10 times 280, and ten 80 bit numbers can now put to 800 two s complement exponents. Exponent range 1-80 is reserved for first 80 bit number, exponent range 81 - 160 reserved for second 80 bit number and so on, so two s complement with 800 exponents can include in itself ten 80 bit floating point numbers. If one 80 bit floating point number has 39 times extended (mantissa) precision, that means 2496 bits in two s complement if mantissa has 64 bits. Those precision bits can be used to store other 80 bit numbers with extented precision and so on, creating mathematical perpetum mobile, until accuracy potential has worn off. Compression ratio can be thousands of times “compression” without even using data compression, information is just presented as floating point numbers “on top of each other”. Last layer has the actual information in bits in two s complement form. If 2496 bits is divided to 800 bits sections it is 3 X 800 = 2400 bits, each 800 bit section has ten 80 bit numbers, so now this system consumes 2400 bits of one 80 bit FP number s accuracy, and consists 10 X 10 X 10 seperate 80 bit FP numbers, or one thousand (1000) other 80 bit FP numbers inside just one 80 bit FP number. Inside these thousand other 80 bit FP numbers the actual information is. Compression ratio is one to one thousand, without data compression. Of course using 2800 to store 10 X 280 information is computationally heavy, and computing 22400 is more computationally heavy still. And computing in software is 1000 times slower than computing in hardware, so I don t know how much time computer takes to decode this thing. But anyway at least 50 000 times compression rate (and perhaps more) is achieved and nowadays floating point processors are very fast, and become faster as quantum computing and optical computing is arriving. Adding unum principle propably increases accuracy and compression potential further still. But is it possible to build hardware floating point unit that uses 39 X extenyed precision?. Modern FP units have 512 bit bit width, altough that is simply 8 X 64 bits parallel, not true 512 bits bitwidth. If OpenGL FP number standard is related to 16 bit standard IEEE floating point, smallest version of OpenGL has 5 bit exponent and 5 bit mantissa, and perhaps 1 bit sign bit. If now we make 8 bit floating point number out of this, it would have 5 bit exponent, 1 sign bit and 2 bit mantissa. That 2 bit mantissa accuracy is increased to 39 X extented precision using hardware ALU, so actual accuracy is 78 bits (2 X 39) and bitwidth is 84 bits (78 bits for mantissa, 5 for exponent and 1 sign bit). Also Gal s accuracy tables or french “Gal s accuracy tables method revisited” (Stehle 2004) method can be used in hardware FP unit, if that method brings 10 bits extra accuracy to 2 bit mantissa, it is now 12 bit mantissa and 5 bit exponent and 1 bit sign bit makes 18 bit wide FP unit. Actually this “Gal s tables revisited” method brings more than 10 bits extra accuracy. If 8 bit unum section is added to the 8 bit FP number with 39 X mantissa accuracy increase the result is 16 bit number with 78 bit ( X 2 if sign bit is used, 156 bit accuracy) FP number with 5 bit exponent, 2 bit mantissa, 1 sign bit and 8 bit unum section. If IEEE standard compability is completely discarded such FP numbers as from netpage “microfloats” section George Spelvi 8 bit with large range but small accuracy 5 bit exponent 3 bit mantissa type can be used. Now small accuracy can be improved either Gal s tables revisited method or extented 39 times precision (the latter perhaps does not work other than IEEE standard numbers?). 3 bit mantissa makes either 13 bit or 117 bit (?) accuracy depending on method. The “5 bit IBM computer keyboard scanning format” (at microfloats) is 2 bit exponent and 3 bit mantissa. Mantissa accuracy of it can be again expanded with Gal s tables revisited or other precision methods. Even 4 bit floating point with 3 bit exponent and 1 bit mantissa is possible with extented mantissa precision, and extented precision can be done at hardware. Extreme minifloat format would be 2 bit floating point, 1 bit exponent, 1 bit mantissa. If IEEE compability is discarded minifloats can use tapered floating point, Richey and Sadeian fractional format, Gray Ray s “bit reversed Elias gamma coding” at exponent etc. methods (at “Between fixed and floating point by dr. Gary Ray”), or Quote mathematical notation, Bounded Integer Sequence Encoding, or Multiple-base composite integer (at as exponent and mantissa etc., but compability to “standard” floating point formats is then no more. And use other floating point accuracy improvement methods like “Löwner s theorem” at “Applied linear algebra” book by James W. Demmel at page 226. There are several accuracy improvement methods for floating point computation, I just mentioned only three. Even my proposed 16/24 bit (11 bit exponent, 5 bit mantissa, 1 sign bit, 7 unum bits) format can have hardware FPU, because 5 X 39 = 195 but only 192 bits is used, so required floating point hardware unit bitwidth is 192 bit mantissa, 11 bit exponent, 1 sign bit and 7 unum bits = 211 bits, and 24/32 bit FP number also, 15 bit exponent, 9 bit mantissa, 1 sign bit, 7 bit unum. 9 X 39 = 351 bits, 351 + 15 bit + 1 bit + 7 bit is 374 bits, which is less than 512 bit width floating point ALU. The FP unit begins with 24 or 32 bit number and gradually expands it to 211 or 374 bit width, not like ordinary FPU that uses from the beginning 256 or 512 bit bitwidth and end result is again 256 or 512 bit bitwidth. If hardware is 1000 times faster than computing in software, floating point units that use this 39 X mantissa accuracy expansion can be built, and these 24 and 32 bit formats are based on “standard” floating point formats (OpenGL and IEEE standard). And using Gal s accuracy tables revisited method in hardware as table-lookup floating point unit (?) etc. For piling floating point numbers “on top of each other”: if simply 2 X extented precision is used altough 39 X is the maximum available, is used in the accuracy, only 160 bit bitwidth is used in 80 bit floating point number so FPU needs to be only 160 bits wide hardware unit. When accuracy improvement has been repeated 15 times accuracy potential has worn off (15 X 160 = 2400 bits, which is still less than 2496 bits available for accuracy) but now inside one 80 bit FP number has 32 700 other 80 bit FP numbers (215 = 32 700), so “compression” ratio (without data compression) is about 1 : 33 000. And floating point unit can be 160 bit width hardware unit that uses 80 bit floating point numbers expanded to 160 bits extented precision. When expanding is done in 15 times result is almost 33 000 times “compression ratio”, but the procedure must be repeated 15 times, before final result (almost 33 000 other 80 bit FP numbers inside one 80 bit FP number) is achieved, and FPU unit must be 160 bits wide not 80 bits as normal FPU. If unum bits are used accuracy increases still perhaps but now perhaps 8 or 12 extra bits are needed for unum so result is 88 - 92 bit floating point format (and doubling it makes 176 - 184 bit bitwidth).

I explain once more: principle is the same as one 96khz audio channel that uses ten different 9,6 khz channels to store information, these 9,6 khz channels have different frequency so they dont interfere each other. Similarly 80 bit floating point number can have a range of 16384 bits (actually 16382 or 16383 bits) that can be computed in hardware, and accuracy of 64 bits that is computed in hardware, because accuracy of FP number is the mantissa of the number, and that is 64 bits. However software tricks can be used that expand this mantissa accuracy to 39 times larger, now 80 bit number can have 39X64 bit accuracy= 2496 bits. If now one FP number is used as a base for ANOTHER ten other FP numbers, 800 bits of that accuracy can be used as representing these other numbers so that first 80 bits goes to first number, bits 81 - 160 to second number etc. These numbers do not interfere with each other because they have all individual place like frequencies of sound. As floating point number accuracy is two s complement, 280 goes to first another number, 281 - 2160 to second etc, and lastly tenth number goes to 2721 - 2800. As these are two s complement that is a bit awkward way to store information, but I don t know any other way to store long string of information so that numbers don t interfere with each other. All these 80bit other FPnumbers have 15 bit exponent, 1 bit sign bit and 64 bit mantissa, and that number is stored in two s complement form in the accuracy of the base one FP number, using (consuming) 80 bits of two s complement accuracy. But now there are much more accuracy to exploit because only 800 bits are used in 2496 bit accuracy. So now begin SECOND LAYER: those ten other 80 bit FP numbers itself contain TEN OTHER FLOATING POINT NUMBERS. Now accuracy potential is exploited to 800 bits + 800 bits = 1600 bits, and number of FP numbers is 10 X 10 = 100. There is a room still third layer 800 + 800 + 800 bits = 2400 bits, accuracy potential has worn almost completely off but now there is 10 X 10 X 10 floating point numbers, = 1000, all these different numbers are individual and different 80 bit floating point numbers. All inside just one ordinary standard 80 bit floating point number. And because the “aft section” is not used at first and second layers that 1600 bit (in 10 first numbers) or 800 bit (in 100 second layer numbers) extra accuracy can be used to store all kinds of information, for example sound in herz needs 16 bits, so putting 16 bit sections of sound from 2800 onwards like 801 - 816 bits is for first herz, 817-832 bits for second herz etc. That additional information storing capacity is extra even already 1000 other FP numbers is stored inside just one. I know storing information in large two s complement form is odd and computationally super-heavy. How much time ordinary PC processor uses in order to compute floating point number with 2400 bit (22400, two s complement 2400) mantissa accuracy out of one 80 bit floating point number using software tricks that can increase accuracy max 39 times (out of 64 bit mantissa)? One second? Ten seconds? One minute? Ten minutes? An hour? Or less? I don t know. Making complex computations is futile if the answer can be given “straight from the library shelf”. That is the principle of the so- called “floating point libraries”, hardware memory that contains all floating point values so no computing is necessary. But even 32 bit floating point library is quite large, and 32 bit FP number has 23 bit mantissa accuracy. So how large must be a floating point library with 2400 bit mantissa accuracy? Quite enormous I suppose. How much memory is needed? Several gigabytes? Or more? Or less? I don t know. But altough this several floating point numbers inside just one is computationally super heavy solution, it can lead to enormous “compression ratio” of information without even using data compression. In three layers and ten other FP numbers per layer compression ratio 1000:1 is achivied, and not even counting extra “aft section” information storing. If just 2X expansion is used so one FP number uses only 160 bits of 2496 bit available accuracy, procedure (different layers) can be repeated 15 times (15 X 160 = 2400bits) and now there is almost 33000 different floating point numbers inside just one (because 215 or two s complement 15 is almost 33 000, and this different layers procedure is repeated 15 times using 2 X 80 bit number leading to 2*15 or almost 33 000 other floating point numbers), and also “aft section” information storing capacity is large because only 160 bits of available accuracy of 2496 bits is used in every layer (altough accuracy worsenes 320 bits in second layer, 480 bits in the third and so on until fifteenth layer has used 2400 bits of accuracy). So “compression ratio” is now almost 33000:1 and large additional information store is also at use. This is “data compression” to the max and its lossless and not data compression at all, information is just represented as “several floating point numbers inside first one + additional aft section information store”. Adding unum number principle so that perhaps 16 extra bits is used leading to 96 bit floating point number (80 bits with 16 or 17 unum bits if 79 bits is actually used at 80 bit FP number). Now accuracy can be much higher perhaps than 2496 bits but also numbers take more room (96 bits + 96 bits etc. so 960 bits is now needed for ten numbers not 800 bits). Also in previous post if unum bits are used to increase accuracy of for example 16/24 bit floating point / unum number that has 192 bit accuracy without unum and then unum increases accuracy significanly more, so proposed 211 bit wide hardware processor can not handle that extra accuracy, perhaps is wise that extra unum accuracy is calculated at the software, not at hardware processor if the accuracy is much larger than 192 bits and no hardware processor has bit width large enough. And if instead of floating point / unum numbers, some super accurate sophisticated number system is used, and similar different numbers inside first one and several different layers procedure is used, if the super- accurate number system is accurate enough, now this kind of data packing reaches truly astronomical levels. For example all content of internet could be packed inside each mobile phone etc., enormous information packing capacity is available. Additions to the list of texts concerning all previous posts: “Out-of-core compression and decompression of large N-dimensional scalar fields”, DJBFFT: extremely fast library for floating-point convulation", “Fast artificial neural network library FANN”, “The Flotsam project: floating point numbers serialization”, “Fast reproducible floating point summation” 2013, “On the arithmetic of recursively run-length compressed natural numbers”, “Pure, declarative, and constructive arithmetic relations (declarative pearl)”, Efficient data structures and algorithms for sparse integers, sets and predicates " 2009, “Algorithms for ordinal arithmetic " Manolios, “Remez exchange algorithm”, “An efficient algorithm for lossless compression IEEE float audio”, “Positional codes of complex numbers and vectors” 2011, “On-line multiplication in real and complex base” Frougny, " Algorithms for complex number arithmetic” R. Mcilhenny, “Real/complex arithmetic using multiplication algorithm” 1997, “Complex interval arithmetic with some applications” Boche, “Complex number arithmetic with odd valued logic” Dao 1980, “Fast integer multiplication using modular arithmetic”, “Complex multiply-add and other related operators”, “Computer arithmetic of complex number arithmetic unit VHDL model”, “Fault-tolerant solutions for complex number multipliers”, “Indexing sequences of IEEE 754 double precision numbers”, “Introducing Libcolumbus, fast, online approximate library”, “A compression method for arbitrary precision floating point images”, “Expansion in complex bases” Anna Chiara Lai, “Parallel and on-line addition in negative base and some complex number system”, “Non-standard number representation: computer arithmetic, beta-numeration and quasicrystals”, “multiple-base number system: theory and applications”, "Exact computer arithmetic in imaginary radix system “, “On the generalized number systems of the complex numbers” Nagy 2012, “New developed pattern in number system, new number field and application in physics”, “A new coordinate system for complex numbers” Ehmka, “Algorithms and time warps: nested complex numbers”, “New extensions of number system and complex field” 2013, “Real/complex reconfigurable arithmetic using reduntant complex number systems”, “Arithmetic unit for complex number processing”, “Inexpensive correctively rounded floating-point division and square root with input scaling”, " Efficient algorithm for computing the new mersenne transform”, “Hypercomplex numbers in geometry and physics”, “Complex instruction and software library mapping for embedded software using symbolic algebra Symsoft” 2003, “Interpretation IEEE-854 floating-point standard and definition in the HOL system” 1995, “A calculus for hardware description” Paric 2010, “Lattices, Voronoi cells, and quasicrystals”, “Quasicrystals and geometry”, “Crystallography at the state of the 21st century: mathematical and symmetry aspects”, “Connections between polytypes modulated structures and quasicrystals” Farkas-Jahnke 1993. “Complex binary number system: algorithms and circuits”, “Computer arithmetic of complex numbers” Stepanenko, “Lattice coding for signals and networks: a structured …” Zamir 2014, “Lowering error floors using dithered belief propagation”, “Piecewise linear system modeling based on a continous threshold decomposition”, “Sparse sampling 1-bit compressive sensing”, “Computer processor system for executing RXE format floating point instructions”, “ELDON: a floating point format for signal processing”, “ADC look up table based post correction combined with dithering”, “Stack enviroment control dump machine SECD machine”, “Computing exact geometric predicates using modular arithmetic with single precision”, “Compiling geometric algebra computations into reconfigurable hardware accelerators”, “A novel signal processing coprocessor N-dimensional geometric algebra applications”, “CliffoSor: a parallel embedded architechture for geometric algebra and computer graphics”, “Investigation into a floating point geometric algebra processor” (those geometric algebra, and quasicrystal texts are for 3D bitplane / cubic bitplane / multidimensional bitplane -thing at previous posts), “The fast floating-point library by Andrew Mui”, “A VLSI analog computer/math co-processor for a digital computer” G.E.R Cowan, “ParseFloat”, “Register packing: exploiding narrow-width operands for reducing register file pressure”. Googling “Minimizing floating point dissipation via bit width reduction” or “Minimizing floating point power dissipation via bit-width reduction” not only gives that old text from 1998 but also netpages about the subject matter and texts that cite this old text. In one such net search I found message chain that mentioned 13 bit floating point number that was fully IEEE 32 bit standard comparable but used only 13 bits. Message chain was “UC Berkeley 61C” but the particular message chain is not there anymore or I don t find it anymore. Anyway only in one sentance was mentioned this 13 bit / 32 bit standard comparable FP number, and no further information about it is to be found. If it is possible to make 13 bit FP number that is equal to 32 bit standard FP number (using this “bit-width reduction” technique), but only use less bits, is it possible to make 26 bit 64 bit number or 32/33 bit 80 bit number? Now if several floating point numbers are layered on top of each other only the first number could be 80 bit ordinary standard that is expanded to 2496 bit accuracy, and all the other FP numbers inside this first one could be 32 bit / 80 bit comparable (32 bit + 32 bit + 32 bit inside this 2496 bit accuracy etc.), now using only 40% of that bitwidth otherwise used by 80 bit numbers. If unum concept is added now perhaps 16 extra unum bits are needed (for 96 bit FP + unum comparable number), leading to 48 bit number, that is still only 60% of 80 bit number. Also Gal s accuracy tables method revisited- table lookup method perhaps works also on logarithmic number systems because Gal s accuracy tables work on logarithmic numbers also not only floating point numbers. There is netpage that deals with logarithmic number systems.

Advances in modern mathematics have made possible that 80 bit floating point number has accuracy of 39 times mantissa accuracy, or 39 X 64 bits = 2496 bits, when previously accuracy was “only” 64 bits. However nobody seems to be interested in exploiting this accuracy. Why? 22496 (Two s complement with 2496 exponents) is so enormously large number (zillions times zillions times zillions etc. converted to decimal system), it is so large number that I don t know if there is a name for it. And 80 bits is only neededed for this super-large value. This accuracy must be exploited and put to good use somehow. Making compact numbers, several numbers into one is one way, but making compact numbers is not easy, and only way I know is large two s complement number, 16 bits is 216 in two s complement form and 16 and other 16 bits is 232 etc. But continuing this is huge waste of number values because 232 is 4 billion values, and 16 bits is 65 000 values and 2 X 16 bits is 130 000 values. So if 232 is used for compact number that should contain about 65 000 X 16 bit compact numbers ( Because about 65 000 X 65 000 = about 4 billion values, or 232), not just two 16 bit numbers in 232. This my technique of putting several two s complement smaller numbers inside one in two s complement form is not perhaps at all real “compact number”, but that is only using large two s complement number to represent several other two s complement numbers, that is perhaps no “true” compact number nor data compression. In netpage “What is a compact number” answer is that compact number from 5 + 9 +4 + 5 is 5945, and that 5945 is the compact number containing four different numbers. But 5 + 9 + 4 + 5 = 24, so number 24 should be the “true” compact number, not 5945. Using value of 24 instead value of 5945 would be huge improvement of information space. However there is the problem that from number 24 the principal components (5 and 9 and 4 and 5) must be accurately extracted back when compact number is decoded. And that is the huge problem. Processing of sound uses two techniques, dithering and Quadrature Mirror Filter to improve quality and for data compression. I am just wondering if these two can be used in this floating point thing also. Small minifloat or microfloats, smallest would be 2 bit floating point (1 bit exponent 1 bit mantissa) are best for using dither to improve accuracy, 4 bit accuray increase is possible, and 6 bits with “noise shaping” and 8 bits or more so now dither noise is in the signal channel but dynamic range (accuracy) is 8 bits (or more). So now 2 bit floating point number will have 4 - 8 bit or more accuracy. Coupling dither with logarithmic number system increases accuracy even more in very small minifloats but now it is logarithmic number not floating point number. Also because in my example 2400 bits of accuracy is divided to 30 different 80 bit sections, is it possible that all those 30 sections have dithered accuracy improvement, not just one base value, all inside one 2400 bit accuracy? I don t know is it technically possible or even sensible to use. And principle of quadrature mirror filter is to shift information from lower frequency to higher frequency and save information that way (I don t know actually how QMF works I just presume). If using 16 bit sound QMF filter banks are used, and 16 bit integer is 65 000 values about, how using QMF filter bank in 80 bit floating point number with its zillions (two s complement with 64 exponents, 264) values and extra large range? If about 30 - 70 % information saving capacity is available at 16 bit integer has the 80 bit floating point number greater capacity of shifting small values to higher -potential, and creating information storage savings? That was using QMF in 80 bit standard accuracy number. But then another way, using full 2400 bit two s complement accuracy of 80 bit floating point number, that is so large number that QMF filter bank can shift information from lower exponent range (below 2800 - 2400 or something like that) to higher range (near 22400) and save information space that way, just like standard 16 bit integer audio compression uses when it uses QMF filter banks. So now only 2000 or 1600 bits are used in two s complement form, not 2400, which would make computing significanly faster (because the numbers are in two s complement form) than using full 2400 bit (22400) computing. But I don t know if this is technically feasible or even possible to use. If numbers are put in chain, putting them in two s complement form (so first 16 bit is 216, 16 and 16 bits is 232, first 16 bit number occupies 216 bits, second 16 bit number occupies 217 - 232 twos complement exponents leading to 232 two s complement number etc.,) is quite awkward but only way I know to combine set of numbers as one. Googling “compact numbers” gives only a few results about the actual subject matter (how to to combine numbers, or how to make compact numbers from several different numbers into one that could not only put together but also extracted back to different numbers if needed). Different ways to make compact numbers is the thing I am searching. Wikipedia: “Extreme value theorem” , “Compact space”, “Supercompact space”, “Empty set”, “Fuzzy set”, “Recursive set”, “Multiset”, “Aleph number”, “Supercompact cardinal”, “Subcompact cardinal”, “Strongly compact cardinal”, “Limit point compactness”, “Sequential compactness”, “Equivalence of mappings between sets of same cardinality”, “Formal language”, “Harmonic analysis”, “Automata theory” (Wiki & Tuomas Hytönen), “Vector space”, “Complex plane”, “Kautz graph”, “Sparse matrix” “Bohr compactification”, “Partition”, “Approximate computing”, “Bayesian computation”, “Byzantine fault tolerance”, “Paraconsistent logic”, “Hermite polynomials”, “Fractals”, “Differential evolution”, “Complete sequence”, “Ostrowski numeration”, “Continued fraction”, “Self- synchronozing code”, “Fibonacci coding”, “Universal code”, “List of data structures”, “Enumerated type”, “Markov chain”. Wikipedia is full of articles about “Computable function”, like “Bijective numeration”, “Gödel numbers”, “Gödel numbering for sequences”, “Effective results in number theory”, “Effective method”, “Recursive function theory”, “u-recursive function”, “Lambda calculus”, “General recursive function”, “Primitive recursive functions” “Church- Turing thesis”, “Chinese remainder theorem” , “Helly family”, “Square- free integer”, “Constant-recursive sequence” and most importantly “Ultrafilter” (with “Ultraproduct” and “Compactness theory”) and “Stone-Chech compactification”. I don t know if ultrafilters and cardinal numbers are only things actually something to do with compact numbers. Bijective number systems like Gödel numbers will make compact numbers (and other recursive, Lucas sequences etc). Other texts: “Ultrafilters, compactness, and Stone-Chech compactification” Dror Bar-Natan 1993, “P-adic numbers” Jan-Hendrik Evertse 2011, “Equivalence and zero sets of certain maps in finite dimensions” Michal Feckan 1993, “Zero sets and factorization of polynomials of two variables” Micki Balaich, Mihail Cocos 2012. I don t actually even understand what these texts are about. And there is a book “Infinite dimensional analysis: a hitchiker s guide” by Charalambos D. Aliprantis and Kim Border. However I understand something from netpages “Countable and uncountable sets” and “Cardinals of infinite sets, part 1: four nonstandard proofs of countability”. What those all is to do with compact numbers I don t know. If some super accurate number system is used, in binary form or other (analogue computers and optical and quantum computers can use other than binary numbers), and that number system / several number systems are layered on top of each other, data packing capacity becomes huge, no need for internet searchs anymore because every mobile phone could have full content of world s internet inside phone s memory in single memory card. And if there is a way to make “true” compact numbers, for example 22400 is so enormous value (zillions times zillions times zillions etc. in decimal system), and that is available at the 80 bit standard floating point number, so for example making chained 16 bit compact number (with each 16 bit number occuping only 65 000 values in this huge zillions etc. number space), that this 22400 bit accuracy and 216382 bit range one 80 bit standard floating point number can now contain perhaps thousands (?) or millions (?) of 16 bit numbers (instead of just 150, because 150 X 16 = 2400) in one huge “true compact number”. If now some super accurate number system is used as base (and not just binary, or then this super accurate number system is transferred to binary), and using “several layers on top of each other” principle and in each layer using “true compact numbers” several numbers chained to a very large single compact number, now perhaps the information content of the whole universe can be scrutinized to a one single 80 bit number. Perhaps for search for “true compact numbers” “ultrafilters” or “compact cardinal numbers” are helpful. Googling around this compact number thing brings only search results of texts of difficult math that I don t understand. If there is a way to “true compact numbers”, however erratic or unfinished or inaccurate or limited range etc., possibility of even non- perfect solution for chaining several values into one and extracting them back if needed (not just my simple two s complement on top of each other- simple technique), would be huge improvement in data compression, considering that 80 bit floating point number has 22496 available number space for accuracy and 216382 for range. Ultrafilters and compact cardinal numbers are the two things that I find, but no other ways to make compact numbers “truly compact”. Perhaps sparse sampling (compressive sampling, like Francesco Bonavololonta 2014 text, only 2% or one 50th of information is needed to restore information back), or error correction codes or other data sorting and data compression techniques can lead toward “true compact numbers”, and Trachtenberg speed system -type counting algorithms perhaps also are useful for compact numbers. Further reading (I don t actually understand this math, it is so complicated): “Advanced calculus” Patrick Fitzpatric, “Geometrics and numbers” C. G. Lekkerkerker, “Dynamics and numbers” Sergii Kolyada, “Fundamental theorems of real analysis AB2.15: Theorems of real analysis”, “Infinity in compactification” cut- netpage, “Hyperbolic manifolds and discrete groups” Michael Kopovich, “Theorems on ultrafilters” Tycho Neve 2013, “Is this a known compactification of the natural numbers?” netpage 16.3. 2016, “Near ultrafilters and LUC- compactification of real numbers” Mahmut Kocak, “Formulating Szemeredi s theorem in terms of ultrafilters” HG Zirnstein 2012, “Three-element bands in BN” Yevhen Zelenyuk, Yuliya Zelenyuk 2015, “Lecture 2 : Compact sets and continous functions” netpage, “Single variable optimization” netpage, “14.7: Maximum and minimum values” Kim Heong Kwa, “Graphing highly skewed data” Tom Hopper, “Compactness and compactification” Terrence Tao, “Analysis-1 induction, sequences and limits” 29.1. 96, “Hereditarily on uniform perfect sets” Stankewitz, Sugawa, Sumi 23.9 2016, six questions at netpage: “The set of zeros a holomorphic functions is finite in compact sets” 3. 6. 2014 and “A set that it is uncountable, has measure zero, and is not compact” 26. 6. 2012 and “Any infinite set K has a limit point in K?” 12. 8. 2012 and “Examples of compact sets that are infinite dimensional and bounded?” 22. 9. 2014, and “Can a set be infinite and bounded” 7. 8. 2014. “How to pick up all data into hive from subdirectories” 25. 12 2013. Googling and “recursive integer partitioning” brings many results, such as “Recursive integerer partitioning algorithm” 28. 9. 2012. From 30.12 2014 : “Set of critical values is compact (closed)”, “Rings of functions determinined by zero-set” Hugh Gordon 1971, “Supports of continuous functions” and “Metrization of the one-point compactification” Mark Mandelkern 1971 and 1989, “Fourier analysis on number fields” Ramakrishnan, Valenza 2013, “The difference between measure zero and empty interior” Tom Leinster 28. 8. 2010, “Topology of the real numbers - UC Davis mathematic”, “Two examples of zero-dimensional sets in product spaces” Roman Pol 1989, and two texts from “mathematics subject classification 2000” series: “GO ideals of compact sets " Slawomir Solecki, “Universal measure zero sets with full Hausdorff dimension” Ondrej Zindulka, : " Notes 8. Analysis: sets and spaces”, and : “5.2 Compact and perfect sets”, and lastly from netpage: “Proof the lim N (1/n) using a hint” 21. 1. 2014. Other: “On one type of compactification of positive integers 2015”, “Compactification of integers” Royden Wysoczanski 1996, “Compactness” Jerry Kazdan 2014, “Professor Smith math 295 lectures” 2010, “Pseudocompact group topologies with infinite compact subsets”, ucsd.udu netpage: “Math 140 A - HW 3 solutions” and “HW 4”, netpage “Chapter 5 Compactness”, “Compact sets- math forum - ask Dr. Math”, netpage “Section 5.4 Accumulation points Bolzano- Weierstrass and Heine- Borel theorems”, “Discrete set” (Wolfram Alpha), netpage: “Interval notation”, netpage “Basic topology”, netpage, “Introduction to formal set theory”, “Using nested iterations and the OVER clause for running aggregates”, “Generating integer partitions in C/C++ (recursive)”, “Support/help/partition_models”. “Formal language” is mathematical theory mainly for text compression, but can it be applied to strings of numbers also? For example "Inflectional morphology, reverse similarity and data mining- " (Alfred Holl) and “Paradigm based morphological text analysis for natural language” (Antonio Zamora 1986). Ypo (Ipo) P. W. M.M. van den Boom has invented “Octasys comp” data compression (patent “Method and device for encoding and decoding of data as unique number values” 2013), and that patent cites old text by W. D. Hageman (“Encoding verbal information as unique numbers” 1972). Can these principles be used for compact numbers also, extracting smaller numerical values from larger one after larger value has been decoded using smaller values? Is it possibler that number 24 can be at some accuracy be divided back for example numbers 5, 4, 9 and 5 after 5+4+9+5 calculation, when decoder receives just number 24 and some additional information? And lastly “Some remarks on the Bohr compactification of the number line” O. V. Ivanov 1984. And googling “differential equation complex plane” or “Differential equations and function spaces in the complex plane” brings also many results, and also googling “Bohr compactification of the integers” and “Fenwick additive code”. Also “On the reduction of entropy coding complexity via symbol groupung: 1 - redundancy analysis and optimal alphabet partitioning” 2004, “Compression with the polynomial transform” 2002, “Applications of Laguerre functions to data compression” Martin 2012, “High speed codebook design by the multitrack competetive learning on a systolic memory architechture” 2004, “Locally adaptive vector quantization” (NASA). But are any of these texts any help for making compact numbers, numbers that in itself contain several other numbers, and those other numbers can be extracted out from the one large value, if any of these texts are helpful of that I don t know. Also googling “number compactification” brings many results. Making (“encoding”) “true compact number” is easy, putting 5 + 4 +9 +5 makes 24, but how the decoder now knows that this number 24 is made using principal components of 5, 4, 9 and 5 and not some other combination? That is the problem of decoding “true” compact numbers. So “true” compact numbers must have a sort of header in front of them or inside them some “arithmetic code” that decoder can divide large sum back to its components, or some sort of “information tag” within. That arithmetic code / information tag can be quite large. For example if 80 bit integer is composed of 16 bit values, and 16 bit value is about 65 000 numerical values, and 80 bit integer is million X million X million X million values (two s complemet with 80 exponents), this 80 bit number can contain 16 X million X million X million of these 16 bit (65 000 numerical) values, because one 16 bit number is 65 000 values, 16 + 16 bit is 130 000 values and so on. Now this large 80 bit “true” compact number needs some header information how to decode back those separate components from 80 bits of information. The header / information tag can be 80 bit floating point number, which has 22496 available numerical values, and 216382 range. So 22496 different " arithmetic codes" are available (because each value of huge 22496 number space can be “address” to a different arithmetic code) with combined range of 216382. The “header” is much larger than actual information, but it is needed to decode large compact number. Now 160 bits (80 bit integer + 80 bit FP header) of information contain 16 X million X million X million different 16 bit numbers of information. That is much more than 5 (5 X 16 = 80) or about 150 (150 X 16 = 2400) 16 bit numbers in integer or floating point form. That is just one example. If 80 bit floating point numbers are used also as information store, information storing capacity grows to astronomical proportions. If capacity of floating point numbers are expanded using layer upon layer technique, information capacity grows yet more. So perhaps only 80 bits, 80 ones and zeros, is enough to include itself the complete information content of the whole universe. But making “arithmetic code” that is capable of decoding those “true” compact numbers is complicated task and math behind ultrafilters and other things is such that I don t understand it. The “information tag” can also be in other form than separate header, for example information how to decode compact number can be encoded inside number itself, like error correction codes are using. The separate smaller numbers that are chained to large one value, or the one large value that contains itself several smaller values, is composed of “arithmetic code” that includes the information how to decode smaller numbers back from one unified larger value, and then the actual numerical information. Error correction codes use about the same principle. Also “blockchain” method of different cryptocurrencies make long chain of information that is encoded and then decoded back. If this same “blockchain” method of cryptocurrencies can be used to making compact numbers in long blockchain that is then when needed decoded back to its principal several smaller numbers, at some accuracy (no 100% accuracy is necessirily needed for compact number encoding & decoding). Almost similar like modern blockchain method used by cryptocurrencies is old “executable compression” method, used for decades in computer industry. Both make several smaller vales a “blockchain” and then put that combination of several smaller values to one large information value. If those principles can be used to making “true” compact numbers also, not just cryptocurrencies and computer programs. There are other methods, ultrafilters, Bohr compactification, compact cardinal numbers etc. And things like Hash Zip, compression that makes information really small, but cannot decode back information that it has encoded, and CABAC video compression and other compression / data sorting methods, like Finite State Entropy (FSE), Q-Digest data compression, error correction codes principles, “Fenwick additive code” etc. could be used for search for true number compactification. If something like that can bring “true compact numbers” to reality, that those numbers can be decoded back to their principal components using “arithmetic code” with actual information in the “blockchain”, additional “header” or “information tag” or something. If ordinary 80 bit floating point number has 22496 information space and several zillions of smaller numbers could be chained to “true compact number”, put that large “true compact number” inside 80 bit floating point number and when needed then decoded back (at some accuracy), about all information in the world would fit inside one 80 bit floating point number. Adding layer upon layer technique would expand it even more (first 2800 values are used to describing other 10 X 80 bit FP numbers, these have inside 10X other FP numbers and these still third layer of 10 X Fp numbers, now 1000 floating point numbers inside just one, consuming 22400 or 2400 bits of 2496 bits available exponent accuracy). No “true compact numbers” are necessiraly needed, but information compression ratio of 80 bit FP number is “only” about 50 000:1 (or perhaps slightly more) in two s complement “numbers on top of each other” (16 bits is 216, 16 and 16 bits is 232 etc) and layering floating point numbers layer upon layer principle. So either super accurate number systems are needed for layer upon layer principle or using “true compactct numbers”. If all those (laeyer upon layer numbers, super accurate numbers systems, true compact numbers) are used data packing capacity is truly astronomical, one 80 bit number is enough for all information that the whole universe can contain in any form. Even without “true compact numbers” , using super accurate number systems and layering these layer upon layer is enough for enormous data storage, but two s complement is uneconomical way to store data, because 232 is just two 16 bit numbers, but 216 is 65 000 values and 232 is 4 billion values, so there is huge disparity. If 64 000 X 65 000 (=4 billion values) could be packed inside 232 number that would be much better, and those values extracted back to their 16 bit (65 000 values) principal components (in my example, of course any bitwidth will do, 16 -80 bits, or more, or less etc.). And accuracy of “true compact number” decoding is not critical, even inaccurate and erratic method will do, because benefits of data packing are so huge (considering that 80 bit FP number has 22496 number space with 216382 range). But even without “true compact numbers” or super accurate numbers systems, using standard 80 bit floating point number with 16 bit unum section or other (leading to 96 bit floating point number with unum section, unum / ubox computing), data packing capacity is huge and lossless. But processor gets buried in number crunching, so perhaps floating point library (with terabyte? or gigabytes? of memory) is needed to help processor to count for example 22400 floating point number, large floating point computations could take hours. But optical or quantum computers are much faster. Also unum/ubox concept and “A new untertainty-bearing floating point arithmetic” Chengpu Wang 2012 perhaps help. At wikipedia “Partition (number theory)” page is “Young diagram” that reminds “Base infinity number system” by Eric James Parfitt. MIPS R18000 processor had effective floating point ALU that was more capable than usual Intel version 1990s, and used different principle than Intel and other similar processors, and also IBM Cell processor had very effective FP unit. Also text “hardware-based floating point design flow” (Michael Parker, Altera) mentions that FPGA- based FP computations can have same speed as integer computing, but this requires FPGA and non IEEE- standard FP numbers. Similar FPGA- based floating point formats are also other writers proposed, some of them use reversible computing. Also graphics cards (GPUs) have now over 6000 floating point units max, and use 64 bit FP format, and these are used in GPGPU concept together with main main CPU. So using GPU as floating point accelerator to solve for example 2400 bit accuracy floating point computation, if GPU could handle 80 bit numbers, and GPUs have teraflops performance, that should bring computing time short for even most difficult (2400 bits accuracy) floating point computations, and if this computation is augmented by floating point library computation time is even shorter. Because number of FPUs of GPU are nearing the amount of FPGA “logic slices” similar tricks that are used in FPGA floating point computation perhaps can be applied to hardwired GPU computing also. Xilinx FPGA have inbuilt ability to use ternary logic (googling “Xilinx FPGA ternary”), perhaps this ternary logic can use ternary numbers systems also, like balanced teranary Tau, tribonacci (on the book “Lossless compression handbook” Sayood in section 3.10.5 is mentioned “a new order-3 Fibonacci code” which should be best of tribobacci codes) and Zero Displacement Ternary (ZDTNS) number system which should be best of all integer number systems, or at least “simple” integer number systems. Other ternary NS are from netpage “changing the base” section (in the bottom of the page, also has “The proposed decimal floating point standard” section) and in netpage data_compression “Ancient ideas, as far as I know it” (23.2. 2013). And “Constrained triple-base number system”. In netpage “Data structures- what is good binary encoding for Phi- based balanced ternary algorithms” 2012. But can Xilinx or any other FPGA use them I don t know. Also complex number system has already FPGA implementation in " “Design and implementation of complex floating point processor using FPGA” Pavuluri, Prasad, Rambabu 2013. Not to mention forthcoming Mill processor which is a sort of Philips Trimedia modernized. If unum concept is used 96 bit floating point number has in fact 17 bit unum section because only 79 bits is used in 80 bit floating point number. If sign bit is not used now range halves from about 216000 to 28000, but now 18 bits is for unum section. Leaving sign bit to unum use can be used in other smaller floating point / unum number combinations also, range is now halved but one extra unum bit is in use, if for example unum has only 7 bits now 8 bits of unum can be used.

In the book “Analog circuit design: Low power low voltage integrated filters and smart power” von Plassche, Sensen, Huijsing 2013, is in the section 5. “Analog floating point converters” pages 101 - 103 delta- sigma modulator that uses “analog floating point format” What is that “analog floating point format”? I know delta- sigma modulators have both analog and digital components. But what is “analog floating point number system” or whatever this delta-sigma DAC uses. Delta sigma DACs have at least theoretically used floating point numbers since 1992 from the text “Floating point sigma delta converter” Kalliomäki 1992. But this DSM from 2013 has “analog floating point format”. Analog computation can have infinitive accuracy, only limiting factor is noise in the signal line. So perhaps this same DSM converter principle and its analogue electronic floating point system can be used in all kinds of data compression duties, not just sound or radiowave transmissions. First delta (& sigma) compression is used to data, text or numbers, then this analogue floating point format makes data smaller still, or contrary, analogue floating point “quantization” is used and then information goes to delta compression. I don t know what is “analogue floating point number format” in delta- sigma converter, altough digital floating point numbers have studied with DSM conversion for decades, how it is used, what are the specs etc. but combining analogue tech with basically infinitive resolution (without quantization) and floating point numbers seems to be an interesting idea. Also netpage “Compact format for floating point numbers” 29. 1 2014, “Pattern-based data compression” Angel Kuri, “Unconventional models of computation through non- standard logic circuits” Walter Carnell 2007. If “true” compact numbers are made, using “blockchaining” them with some arithmetic code, using header that is seperate from actual information etc. techniques, very large true compact number with zillions of smaller numbers chained to one large number, would require perhaps fractal mathematic, efficient partitioning algorithms, error tolerant computing, Bohr compactification, Fenwick additive code, Hermite transform, ultrafilters with Stone- Chech compactification, compact cardinal numbers, Bayesian computation, approximate /reversible computing, error correction code -type solution and other tricks so that decoder can find the principal smaller components from one very large number. Perhaps “Learning Vector Quantization” with its “artificial neural network” tries ty figure out the true components of compact number with the help of arithmetic codes and blockchain coding. Information must perhaps first be changed to such form that decoding of large true compact number is possible, so some information is inevitably lost, so this true compact number is perhaps lossy information packing. And results of decoding perhaps are not 100% right, so error tolerant computing and approximate computing is perhaps used. But even inexact or inaccurate “true compact number” would be huge step onward in data packing. But that “layer upon layer” technique works even without “true” compact numbers, “ordinary” compact numbers will do also. Main point is that accuracy of number system must be higher than ordinary 1 bit integer has 1 bit and 1000 bit ineteger has 1000 bit accuracy. If accuracy is of number is much higher than ordinary 1 bit is 1 bit accuracy per bit, then several layers of information could be put inside this number, layer upon layer, and more the layers are the more exponentially information store expands. Actual information is in the last layer, other layers are used as data packing. Last layer is reached then when accurary potential has worn off, but before it happens there are now several thousand other numbers inside just one , using for example 10 X 10 X 10 in three layers, one thousand other individual numbers inside just one. But when after layer multiplication, number still has accuracy left, and that accuracy is not used for layer upon layer numbers, that accuracy that is left can be used as additional data store also and so increase data packing capacity even more. For extracting smaller values from one large number, perhaps “Asymmetrical reversible variable length code” (RVLC), or “Component analysis theory”, or “High quality DCT- based image compression using partition schemes” 2007 (last one is video compression, but if video frames of that partition scheme are as number fields, perhaps then it can be used as number partitioning), and there is theory of “Systemic Functional Linguistics” (SFL) that has nothing to do with mathematics but linguistics. However mathematic is a language that use symbols to represent information, and SFL has “metafunctions” and “registers” and other math sounding principles, so perhaps using it is some help for finding “true” compact numbers, text “Hallday s model of registers revisited and exploited” Annabelle Lukin. Also “Inexpensive correctly rounded floating-point division and square root with input scaling” 2013. And “Alignment Query Language” (AQL), “Querying string databases with modal logic” Matti Nykänen 1997 University of Helsinki, and “Aspects of relevance in information modelling. Methodological principles and conceptual problems” Esko Marjomaa 1997 University of Tampere ISBN 951-44-4223-7, ISSN 078-647X, publication series FITTY 63. The Marjomaa s book is perhaps not in the internet at all but only available at book form. Most logical way to make easily partitioned numbers is “bijective number systems” with “Gödel numbers” and Gödel numeration, Wikipedia is full of articles about the subject, "Gödel numbering for sequences ", “Computable function”, “Church- Turing thesis”, “Effective results in number theory”, “Effective method”, “General recursive function”, “Lambda calculus”, “u-recursive function” that leads to “Chinese remainder theorem”, “Total recursive functions” etc. Perfect solution would be super accurate number system that is also easily partitioned like Gödel numbers and other similar. And similar way that floating point library is used at FP computation, large (terabyte or gigabytes) “Gödel numeration library” can be used to ease CPU & GPU workload. If Gödel numeration is not used, then perhaps some other way to make one large number that is composed of billions or zillions smaller values, and those smaller principal components can be divided down from that one large value. But can Gödel numeration, Lambda calculus, Church- Turing method, reversible computing or any method handle perhaps zillions of 16 - 80 bit sections dividing down from for example 2400 bit (2*2400) or 3528 bit number? These 16 - 80 bit sections are “true” compact numbers, so zillions them fit inside 2400 bits. The accuracy is not important, even erratic way will do, if it can encode zillions of smaller values and compose them in one large value that is possible to decode back to its smaller values, using header, blockchain, error correction code, reversible computing etc. Other texts: “Scheduled relaxation Jacobi (SRJ) method” , “A binary access control using prime factorization” Chang 1997. Wikipedia: “Constant-recursive sequence”, “List of data structures”, “Enumerated type”, “Markov chain”. And “partition number system”, “Unary representation of natural numbers”. In netpage is interesting article “Novaloka maths on the number horizon - beyond the abacus”. It has “BigO-”, factoradic-, binary/ ternary double/ triple edged-, binary system B-, “nested binary biological number system B notation”, “Alpha Mann numbers” (Ackerman numbers revised). In “is there a number set that is above complex numbers?” is answer. In “Possible number systems” by Rips L. J. and Thompson S. 2014 is numbers as graphical pictures (functions) instead of numbers (symbols). There is a book “Encounters with infinity: a meta-mathematical dissertation” by Michael van Laanen 1994/ 2002 but I don t know if this book is pure nonsense or not. Also “Isabelle” framework has “hyperreal numbers”. Different number systems are many: combinatorial-, segmented-, lazy-, mixed radix-, index-calculus-, skew-, modular-, minimal polynomial-, polynomial iterative-, partition number system, and unary representation, (hierarchical) residue,- multiple base (composite integer), Peano, - Gödel-, Lucas-, and perhaps some more number systems, Giant numbers, hereditary binary-, tree based representations etc. In Wikipedia there is “Residual sum of squares” principle, netpage “Beta expression accounting for residual spatial auto-correction in R” and “Calculations of residuals for extreme valued distribution in R”, netpage is “The simple line R regressive model”, and “Using extreme value theory and copulal to evaluate market risk”, the latter is stock exchange analysis, but useful in math. If recursive arithmetic models are being used and/or indexing algebra (Index calculus algorithms and number systems), perhaps Recursively Indexed / Vector/ Quantizer (RIQ, RIVQ) can be used. And about number systems there is an article “A new approach to the classification of positional number systems” (Borisenko, Kalashnikov 2014).

There is a new text “Solver for systems of linear equations with infinite precision” by Jiri Khun 2015. If any calculation can reach endless accuracy, that means that endless amount of information can be packed in very small number space, in this case System of Linear Equations (SLE). Infinite accuracy also leads to infinite calculating time, but if very large number, or line of integers can be put inside (encoding) in SLE which is combination of two linear equations (as far as I understand), almost endless amount of information can be encoded inside one SLE. That requires that result of SLE is very large numbe when equations are solvedr. The computing method presented is using GPU, and GPUs have teraflops of computing power. So perhaps this SLE solving method is one way to encode almost endless amount of information in very small space, in equations of SLE. Encoding is transforming very long line of integers as SLE, that is small enough and not require much numbers to written down. But when this SLE is being solved (decoded) the solving (calculation) leads to a very large number (line of integers). That line of integers has chained information for example simple 16 + 16 + 16 bits etc. (meaning that two s complement with 16 exponents, 216 is first 16 bit number, two s complement with 32 exponents, 232 is one number 216 in exponents 1-16, and another 16 bit number 216 in exponents 17 -32, etc.),-chain, making large two s complement number a “compact number” or in “true compact numbers” integer form, true compact numbers need some algorithm to dismantle or partition very large integer to its smaller number components. Also, there is a new method of vector compression, “Additive Quantization” (AQ, by Martinez) that leads to “Extreme vector compression” etc. results. Any mathematical entity that promises “endless accuracy” or “infinitive precision” can be a key to endless data compression. If simple mathematical equation can have endless accuracy of large number of integer values (millions or billions), then this equation can be used to store information in that equation. In my example I used standard 80 bit floating point number that can have almost 22500 information content, or two s complement with almost 2500 exponents. It is not infinite accuracy but close enough, 22500 is enormous number. If unum consept is used accuracy is even greater. If system of linear equations can be used also to store almost infinite amount of numbers, that can be also used. Large line of integers are used to “warp” SLE and perhaps then this SLE that can perhaps be represented in few lines of code, and can include itself the whole information content of the universe, etc. If someone just would check out internet and libraries and find out every article and study that promises “infinitive precision” or endless accuracy of some mathematical calculation that is relatively simple. Then those simple calculations can be used to encode itself almost endless amount of information. When mathematical calculation is solved it brings out almost endless line of numbers, and in those numbers are the information that is encoded as line of integers etc. ways to incode information.

Musical scales in modern music that use other than standard octave scale have developed some mathematically very complicated ways to divide number base 12 (octave scale) to smaller parts. As base 12 is also one of most efficient number bases (together with number bases 3 and 6) that ocatve dividing (musical) methods may provide efficient ways to divide number base 12, and then this “octave” number base can be used as data compression and representing numbers with high efficiency, now musical notation can lead to effective data compression of numbers. Some of muiscal scales have high mathematical complexity or they are otherwise very sophisticated methods, some of them use fibonacci numbers and golden ratio, like “Bohlen 833 cent” scale that is one of non-standard musical scales. Bohlen 833 cent has “unique properties” and “complicated harmonic relations”. ( netpage and Billy Stiltler 2015 Bohlen 833 cent approximate integer). If tribonacci base or Ostrowski numeration is used perhaps even more efficiency is achivied. In netpage is in section “ScaleIndex” and its subsection “Families of scales” some mathematically very sophisticated microtonal music scales. Microtonal scales divide octave to small portions. Some of those base 12 dividing scales perhaps can be used as number base for data compression, to represent numbers. Microtonal scales at scaleindex and families of scales include three major scale families “equal temperement” (standard scale), Fokker blocks and Moment of symmetry (MOS) scales. If data compression is the goal, perhaps Lesfip scale, Maximal harmony epimorphic scales, MOS cradle, Combination product sets, Overtone scales (Mode 30, the last overtone scale in list), Numerological ontemperement, Superparticular-nonoctave-MOS, Marvel Woo, Yantras, Hemifourths, Peppermint-24, The Marveldene and “Crystal balls” are suitable for number bases for data compression. The previous list is choosed from ScaleIndex and its subsection Families of scales, there are many more microtonal scales on those lists. “Euler genera”, Fokker blocks and “High school scales” are general methods to microtonal tuning. Articles in “Monzos” and “Monzos and interval space” explain some of those octave dividing systems. In wikipedia is “Limit (music)” and “Define function” etc. articles. Modern microtonal musical tuning uses some extremely sophisticated methods to divide octave (or base 12) to parts, and use such as Phi, golden ratio, fibonacci numbers etc, and sometimes even combining two of those together. Making a way to represent numbers most economically also uses base 12 sometimes, fibonacci / tribonacci bases, golden ratio (negative beta encoder) etc., so perhaps some music scales offer ways to compress number values to a very compact form. Because “interval arithmetic” is used to many mathematical applications, and music is based on intervals or dividing larger intervals (octaves) to smaller parts (microtonal scales) perhaps musical scales / microtonal scales can offer method of data compression to interval arithmetic and any other number based systems. Not just microtonal scales but other music scales also like Bohlen 833 cent that deal with octave dividing methods. If octave is number base 12 number that is very effective as data compression because base 12 number is one of most effective number bases. In netpage in section “interactive synths” in section “my explanation of just intonation” in section “my system” is another octave dividing method (based on just intonation), and there are many more octave dividing methods, microtonal or otherwise. Representing fractional values in effective numerical form is one of the challenges of mathematics and data compression. Because those musical scales, in netpage for example, are very sophisticated and complex mathematically, they may offer a way to represent fraction of number values very effectively.

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One way to minimize information bandwith is differential representation. For example “differential floating point” (DFP) would be like 10/11 bit OpenGL FP number, but represents differential values like DPCM (diffrential pulse code modulation) is related to linear PCM. 8 bit or 4 bit DPCM / ADPCM is almost like 16 bit linear PCM integer values, so 10/11 bit differential floating point number is almost like 32 bit floating point number in precision. Also Binarized Neural Networks (BNN) are new paradigm for information representation. They offer some very efficient capabilities like only 1 slice is needed in BNN values instead of 200 in FPGA blocks. So if there exists any kind of “BNN numbering system” (BNNs that I have read use 1 bit differential values, either plus or minus 1 bit ,so basically these BNN networks are just simple 1 bit differential systems, altough BNNs are not so “simple” perhaps). But if this new 1 bit differential BNN method is very effective it can be used in various applications, for axample printed electronics (roll printed electronics needs simple systems like 1 bit signal path etc.). If 1 bit signal is dithered 4 bit value is reached without change of information, 8 bit precision from 1 bit may be rached with 1 bit dithered, but dithering noise is now audible/visible in signal itself. Using noise shaping techniques perhaps 8 bits precision or more is available in 1 bit signal and dithering noise can be filtered out. So if dithered/noise shaped binary neural networks are possible I don t know. They will have 4 - 8 bit or even more bits precision and use 1 bit differential dithered/ noise shaped signal in their signal path. Applications may be for example in sound synthesis, BNN network 1 bit differential sound synthesizer that is made with roll printed electronics, and mobile cellphone hardware music synth / ringtone generator that uses BNN to sound generation etc., altough it has perhaps low transistor count it can be very effective hardware music synth etc. FPGA based music synths etc., are possible (?) using BNNs. If binarized neural networks can be used as music synths and other applications. Or to represent any information very efficient way, like sound, still pictures or video, or any numerical information. Binarized neural networks use “sigmoids” and “filters” so that sounds like sound synthesis. Other new techniques are “The Feynman Machine” (artificial intelligence) and “Ising computer” (Hitachi H). Texts: “BinaryNet: DNNs with and to +1 or -1”, “CUMF: Scale index factorization”, “Deep X: a software accelerator”, “PANDA: extreme K-nearest neighbour search”, “CVC: contourlet video coding”, “Improved lossless image compression model using coefficient based discrete wavelet transform”, “Quantized neural networks: NNs with low precision”, (also additive quantization AQ, Martinez), “AQsort sorting algorithm”, “Outrageously large neural networks” (2017 Shazeer), “TAMP: a library for compact DNNs”. Also if binarized neural networks use 1 bit values, and there are phase shift keying methods that use 1 bit values also, and such methods like quadrature phase shift keying is used in radio communications and other communication, why not combining binarized neural networks and (quadrature or other) phase shift keying methods for radio communication or other information compression. And I am again thinking sound synthesis here. Roll printed electronics must have simple (1 bit?) circuits so any way to improve 1 bit efficiency is needed if roll printed circuits are used (that are cheap). Are binarized neural networks suitable for roll printed electronics? Or other 1 bit methods? And if artificial intelligence is using tree-based logic structure, is it possible to use tree-based number system (numeral system) with it? Texts: “Is there a tree-based numeral system (closed)” 2016, “Huffman encoding trees”, “math-Algorithms based on number base systems?” 2011, “System and apparatus for decoding tree-based messages” 2017 Fleming, “Number systems and data structures” Ralf Hinze 2005, “A scenario tree-based decomposition for solving multistage stochastic programs”, and most importantly “tree based numbering systems” several texts about the subject by Paul Tarau. In netpage is “RIES library”, another tree based method for number representation. “An efficient parallel data clustering algorithm using isoperimetric number of trees”. Using floating point unit as differential method is possible also, using small mini- or microfloats with differential principle like DPCM is similar to linear PCM is sound. OpenGL uses 10 or 11 bits FP, but neither have sign bit. However adding sign bit to 10 bit OpenGL FP number makes another 11 bit FP number. There is even smaller “quarter precision” or FP8 format that has only 8 bits (1 bit exponent, 4 bits exponent, only 3 bits mantissa). That is non standard but still used in Cell processsor (Playstation) for example, and others. Its accuracy is very low. In netpage is “Where will floating point take us?” where 8 bit exponent and only 1 bit “Implied mantissa” FP microfloat is suggested. In netpage in “floating point” section is 10/11 bit FP to 8 bit integer accuracy measurements, and Bartwronski s own microfloat suggestion “Untested idea-using YCoCg color space?”. Simplest 8 bit FP number would propably be simply 7 bit integer (with or without “hidden bit”) mantissa with no exponent and 1 sign bit, this 7-8 bit integer simply runs through floating point processor, so FPU capacity can be used in integer calculation using small 7-8 bit values. These microfloats can be used in differential way in “differential floating point” (DFP) system, improving the bad accuracy of these small numbers, compared to linear floating point representation. Also dithering that is used in sound recording with FP values can be used to improve accuracy. Even very small 4 or 5 bit floating point formats are now possible if dithering (and noise shaping in signal) brings 4-8 extra bits of (mantissa) accuracy to originally 4 or 5 bit microfloat, to 8 or 11 bit FP etc. Other ways improve bad accuracy are logarithmic (8 bit mu-law encoding is floating point format with 4 bit “small table lookup mantissa” and 3 bit exponent), “Multiple base composite integer” at MROB:com netpage (dithering improves these still further), or using software to bring extra accuracy to FP calculations, or use non-standard floating point methods (but microfloats of 11 bits and below are non-standard anyway). These methods can be used in differential floating point system also. Even 1 bit floating point format exists in experimental delta-sigma modulation with floating point number system. Delta-sigma modulation requires analog electronical components. In book “Analog circuit design: low power low voltage integrated filter” 2013 is “Analog floating point conversion”, delta-sigma modulation that uses floating point numbers. Delta-sigma modulation is 1 bit system. This 1 bit FP is differential system by nature. Also Hatami distributed delta-sigma modulation (improved version “A novel speculative pseudo-parallel delta sigma modulator” Johansson 2014) or “A higher order mismatch-shaping method for multi-bit sigma-delta modulators” A. Lavzin 2002, and “Direct digital synthesis using delta sigma modulator” Orino, “Oversampling without delta sigma modulation” Takis Zourntos are efficient methods for 1 bit delta (sigma). These require oversamping but perhaps oversampling ratio of 2 or 3 is enough if signal noise shaping etc. is used. So 1 bit signal can be used in similar tasks that nowadays require 16 or 24 or 32 bits of either integer or floating point prcessing. But that requires special 1-bit ALU to existing FPU and integer ALU CPUs and GPUs. There is experimental complex number system ALU in FPGA, that FPGA uses three number system ALUs, integer, FP and complex number base. It uses three different ALUs but complex base ALU is using FPGA programmable blocks, not standard ALU in the chip (“Design and implementation of complex floating point processor using FPGA” Pavuluri 2013). 1 bit Delta-sigma ALU can replace floating point units in cheap devices (roll printed electronics, which need simple signal path, 1-bit or other). DSM is already used in 16 bit integer A/D conversion in audio. If 1 bit distributed delta-sigma is much more economical than integer or even floating point at small values, three ALU CPUs or GPUs (one for integer, one for FP, last for 1-bit D-S) can be in use. Devices already have DSM in use in A/D converters and MP3 players etc, so using these DSM (with their analog electronic parts) to similar tasks like foating point units or integer ALUs is “cheap” conversion. Part of the tasks that now require FPU or integer ALU can be done in 1-bit “DSM ALU”, saving bitrate substantially. If analog components don t fit in CPU or GPU simply using SoC D/A converter DSM components is cheap solution, many CPUs and GPUs are integrated in larger SoC nowadays. Coarse Grained Reconfigurable Arrays / architectures (CGRA) is FPGA in different way (with names like Xputer, CCCP, CRISP, MuCCRA, DART etc.). These are simplified FPGAs with multi-bit signal paths instead of 1-bit. If (oversampled) 1 bit signal can be noise shaped and dithered so that quantization noise is in another frequency than information, then perhaps 10 or 15 or 20 bit information can be in 1 bit signal path. So this 1-bit signal needs CGRA or other multi-bit processor because this 1-bit has multibit accuracy. IBM POWER processors use in some models extra features that are similar to FPGAs, or are recunfigurable routings. Other multibit systems using 1-bit are multibit (cascaded) delta sigma modulators. In paper by Hannu Tenhunen, Bingxin Li or A. Gothenberg (“A new cascaded sigma delta modulator structure using multi-bit quantizers”, and “A structure of cascading multi-bit modulators without DEM or digital correction” or some other similar paper, “…semi-uniform quantizers” etc.) is presented system that uses multibit or multirate 1-bit DSM that has maximum 1400 bit (or 1400 rate order multirate DSM) accuracy using only delta sigma structure. This is radio frequency system with large oversampling ratio but still max 1400 bit accuracy (or 1400th DSM rate order) using only delta sigma is huge. That max bit accuracy was 1419, or 1427 or something like that in delta sigma system with large oversampling ratio. Other new concepts are MPSoC (SegBus platform etc.), Petri Nets, Ising Computer (Hitachi), Boltzmann machine (algorithm), The Feynman machine (AI concept). Other: “Precise quadrature signal generation by sampling”, “A four quadrature signals generator” Wu 2016, “A novel high speed, reconfigurable demapper symbol deinterleaver for DVB-T” Horvath. For CPU simplicity: according to Rice University if inexcact computing is used 8% error rate will lead to 15 times much effective circuits. Floating point units and integer ALUs can be used with inexact computing, GPU graphic processors etc. signal processing. If processor has error correction hardware similar to “cryptocores” of some of today s processors, now information goes first to error correction unit that adds some error correction code to information that has correction rate of 8% false bits/ 92% correct to 100% correct when corrected. Now this information with error correction code enters actual FP or ALU processor or GPU, it is processed 15 times more effectively than normally because of enexact computing, then information enters error correction unit again where error correction code corrects 8% false bits to correct. This CPU or GPU has additional hardware because error correction unit is needed, but actual CPU or GPU can be 15 times more effective than normal because of inexact computing.

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It is possible that in previous posts I have messed the meaning of the word “Arithmetic Logic Unit” (ALU). I did not notice that ALU is term reserved for integers only, and I have perhaps somewhere written something about “floating point ALU” or something similar. In my odd “floating point ALU” I simply meant ordinary floating point unit (FPU). ALU can also mean complex number etc. computing, but not floating point that is always called FPU. However I did not notice that difference and wrote “floating point ALU” meaning simply floating point FPU, not integer computing, because I thought ALU is word that covers all kinds of computing, floating point included. If computers are analog, either electric or optical, using polarton lasers etc, in Youtube “Non binary computing in the future” is “spectral computing” (spectral mesh processing?, sparse spectral computing?, sparse spectral clustering?). Analog memory is needed in analog computers, like “improved magnetic information storage using return-point memory”, netpage : “Analog memory” 2014 that is old delay line analog memory types like PAL TV system used, memristor based novel (analog) memory devices, US pat. 5504699A “Nonvolatile magnetic analog memory” 1996, pat. 5089991A “Non volatile memory core” 1992, pat. 5339275A “Analog memory system” 1994 that is partly optical (?), so like optical Blu-ray disc can be used in magnetic / optical memory (?), pat. 6476753B1 “Analog to digital conversion” 2002 Motorola, pat. 5375082A “Nonvolatile, high speed analog memory” NASA 1994, pat. 4627027A “Analog storage and reproducing apparatus” Sanyo 1986. In netpage is “Logarithms for analog circuits”, “Sticky logic” circuits means circuits with memory, US pat. 4524292A 1985, pat. 5448749A “Optical vector multiplier” 1994 Mitsubishi, pat. 8274312B2 “Self-computable memory-based analog computer” 2012. Also if Fabry-Pero interferometer is now downscaled to small size (VTT) it perhaps can be used as waveguide, ARROW or otherwise. Also magnetic bubble memory, like Sheet RAM (SHRAM, Richard Lienau), can be analog (?). Reconfigurable computing (Xputer, HPRC, Warp processor etc.) inexact computing, unusual computing etc. can be used. “Exploring alternative universes with hypercomputation (wondrous mathematics)”, " Strict finity and the logic of mathematical applications" Spatial information theory: 12th conference", “Reflective abstraction in the advanced mathematical thinking”, Petr Kurka: “Dynamics of number systems”, “Cluster analysisi: basic concepts”, "Algebraic graphs with class (functional pearl) "2017, “Ornaments: parametricity for safer code reuse”, propabilistic sampling, “Wavelet importance sampling: efficiently evaluating products of complex functions” “Optimizing set diversity” ( netpage), “Principal component regression” Ana Zumel, “Perfectly random sampling with markov chains”, “Autoconstructive evolutions of structural problems” and “Tag-based modularity in tree-based genetic programming” both 2012 Harrington, “A rational method for lossy compression REWIC”, “SUSAN low level image compression”, “OCLS: a simplified high level abstraction” 2016, complex Ackerman function, “Symbolic analysis of simplified transfer functions” 1993, “Towards hybrid symbolic/number computational approach in controller design” 2002, 20.1.2016 “Fast symbolic linear algebra CAS?”, "YACAS: a do-it-yourself symbolic algebra ", 2010 “Simplification by symbolic algebra programs”, (poker playing AI program), “Concept programming” (XL programming language), “Natural log-curve of the fudge factor”, “Progressive abstraction for sparse sampling” 2015, “Abstract nonsense: symbolic calculus in Haskell”, “Simplified propabilistic programs using computer algebra”, “PSI: exact symbolic inference for propabilistic programs”, “Introducing Cadabra: a symbolic computer algebra system”, “Complex library mapping for embedded software using symbolic algebra”. For simplifed mathematical abstraction and sampling. Other than inexact computing, asymmetrical processing or unusual computing (stochastic-, chaos-, reversible-) is “abstarct code compression”, meaning making program code smaller using data compression etc., and smaller code perhaps run faster in computer, Albert W. Wegener has many patents in this type data compression inside processor, and Synthesis kernel by Massalin is minimal code to maximum effect. Cache compression is another version of code compression. Using differential (delta) like delta-sigma modulation has methods like qiuadrature delta sigma, bit truncation delta sigma, or look up table delta-sigma methods. When printed electronics is coming making possible to make individual ASICs in one only printed circuit at the time, that makes possible to use lambda calculus on the hardware, so each computer program is the computer itself, when computer program is made it is printed directly on the hardware using inkjet printing and hardware description language or other than can make program (lambda calculus) directly into logic chip. So instead of programming some IC architecture each computer program has its own architecture, that is printed using inkjet printing. “Haskell to hardware” 2015 and “Professor Sherwood proposal hardware based on lambda calculus” 2017. SECD machine and improvements like CAM (OCAML, Hardcaml), FAM, ZAM, CLS, CEK, CCS, VEC2, JVM, TyCO calculus, pi-calculus, Sequent calculus are about the same, even Java Virtual Machine can be used for directly printing program into circuit if JVM is improved form. If commercial inkjet printers reach 14400 dpi, that is 1,76 micron, perhaps 3,5 micron transistor is possible, and laser printers have 9600 X 9600dpi, 2,65 micron, that is perhaps 4 micron transistor possible. So about 1 million transistors is possible in inkjet printed circuit using commercial printer modified and lambda calculus- type structure, like Pentium 1, or 5- 7,5 million like Pentium Pro and Pentium 2, or 100 million transistors if Intel Quark power saving methods are used, but chip is now square meter class and very slow. Special inkjet printers purposedly build for printed electronics can be made that reach 100 - 65nm accuracy, but no commercial are made only laboratory experiments. But if 100 - 65nm is possible that opens new opportunities for inkjet printed lambda calculus hardware chips. About bit truncation and other: “1 bit compressive sensing: reformulation and RRSP-based sign recovery theory” 2016. “Sub-Nyquist sampling system for sparse multiband signals” 2014, “Robust 1-bit compressive sensing via binary stable emebeddings of sparse vectors”, “Spectral efficient communication employing 1 bit” Tim Haelsig, extreme chop sampling, “Systems with Lebesque sampling” 2002, “Bandwith sampling data acquisition with the…” 2017, “Sampling of signals for digital filtering and gated measurements”, “Microstructure noise, realization and optimal sampling”, “Optimal nonlinear models for sparsity and sampling”, “Comparison of sparse-grid and geometric and random sampling”, “Approximate optimal control of affine nonlinear continous-time systems using event-sampled programming” 2017, “Nonlinear optimal itarilizing comtrol under sampling” “SML samplers for Bayesian optimal nonlinear design”, “Event-sampled optimal adaptive regression” 2015, “Communication with 1-bit quantization and oversampling at the receiver: spectral constrained waveform optimization”, “Delay window blind oversampling clock and data recovery algorithm”, “Restore truncation for performance improvement” Zhang, “2-1, 2-2, and 2-1-1 MASH delta-sigma for 18 bit truncation”, “Realisation of nonrecursive delta-sigma modulator using look up tables” 1987, “Simultaneus sampling data acquisition architectures” 2015 Patents: US 20020087640A1, US 5214598A (1993), EP2412098A1 “Sigma-delta modulator including truncation” (2012), US 20080297386A1, US 8085176 (2011), US 20040263365A1, pat WO 1997037433A1, pat EP 1612951A2 "System and method for simplified analog “, pat US 6005506A (Qualcomm 1998). “Introducing PilGRIM: a processor for lazy functional…”, “Pipelined graph reduction instruction machine”, “The Reduceron processor” (Naylor), “Programming a multicore architecture without coherency and atomic operations””, “Implementation and applications of functional languages”, “Fractional integro-differential calculus and its control-theoretic applications” 2013. Also: “Design and layout of a programmable bandpass IQ delta-sigma modulation analog-to digital converter” Saucier, Bryant 2001, “A low noise delta-sigma phase phase modulator for polar transmitters” 2014 (polar modulation / polar modulator principle), “Frequency-agile multiband Q signa-delta modulator for cognitive radio” Marttila, “Direct digital synthesizer with tunable delta sigma modulator” Vankka 2004.

There are ways to make quantile estimations of data, like t-digest algorithm or HLL++ algorithm. I am just wondering if quantile estimation someway helps to make “true compact numbers” or “cubic bitplane” and those two can be encoded with information that can be exctracted from them in some accuracy, exact accuracy is not needed, information can be inaccurate but still intelligible. So quantile digest algorithms like those and “Quantiles over data streams: an experimental study”, “Optimal gossip algorithms for exact and approximate quantile computations”, “A fast algorithm for approximate quantiles in high speed data streams”, “Incrimental quantile estimation”, “Frugal streaming for estimating quantiles”, “The P2 algorithm for dynamic calculation of quantiles and histograms without storing observations”. And “Improved distributed algorithm for exact shortest paths”. Also error correction codes can correct information even if maximum about 90% of it is wrong. Combination of error correction and quantile estimation is perhaps best. Cubic bitplane of 1024 X 1024 X 1024 bits is 1 gigabit or 125 megabytes. Sending this 125 megabytes like encryption key is send before actual message, can be used to send large amount of (inaccurate) information if receiver knows already how to extract information like quantiles and error correct the information from bitplane, or both instructions and bitplane are send. Or otherway around: cubic bitplane is standard library that everyone have and only instruction how to extract information from it are send. Information is extracted from this cubic bitplane using geometrical shapes of bit lines, L - shaped or straight, Bezier curves etc., and bit lines can also cross each other inside this cubic bitplane so single bit of information can be a part of several bit lines, so this bit is “recycled”. Error correction codes must be used, and bit lines cut to suitable short sequences that information can be found before bit lines (or curves) become too long and even most efficient error correction codes can not make (incorrect but usable) information out of cubic bitplane. Or use “True compact numbers”, they can perhaps be made and then use Bohr compactification, error correction, quantile estimation, ultrafilters, Stone - Chech compactification and other techniques to extract principal components from one number, from example from numbers 5, 4, 9, and 5 are encoded as number 23, from number 23 can now be extracted components 5 + 4 + 9 + 5 that together make 23, at some accuracy (exact accuracy is not needed, just some approximation if the information is still intelligible), if only number 23 is send to receiver, which is “true compact number”, not 5, 4, 9, and 5 together (that make 5495, not 23). In post “oct.16” six posts earlier than this I made silly counting mistake (I was writing in hurry and then not checked what I wrote) that 5 + 4 + 9 + 5 = 24, but 23 is of course right answer. When processors now use 64 bit floating point format, simple way to increase integer computing power is to use also FP unit to integer computation. If 64 bit FP number has 52 bits of mantissa, “floating point format” that has 0 exponents and 52 bits fraction / mantissa is simple way to use 52 bit integer in floating point unit. Now also FPU can be used in integer computation not just integer ALU. If sign bit is used result is signed integer 52 + 1 bits. 52 bits integer precision is enough for almost all computing, and integer computing is faster than floating point. Of course smaller integer values than 52 bits can also be used. So perhaps at the same time both FPU and ALU can be used to integer computation.

Floating point numbers can also be used as blockchain. Blockchains that Ethereum etc. blockchain based technology uses are large, many gigabytes at largest. If instead of normal blockchain floating point numbers are used to create complicated and large information field, that is also possible. Using floating point computation that is calculated at software not hardware is perhaps 1000 times slower than computing floating point number in hardware. If Shewchuk s algorithm, improvements by S. Boldo and Malcolm, Sterbenz theorem etc. is used, mantissa (significand) accuracy of floating point number can be improved up to 39 times. If 64 bit FP number has 52 (+1) bit mantissa, accuracy is 2028 bits, not 52 bits. Now this 2028 bits can be used to store several floating point numbers 64 bit + 64 bit etc., so 31 FP numbers that are 64 bit wide can be stored in one 64 bit FP number (inside its mantissa). Concerning slowness of computation when computer computes 1984 bit FP number to needed to store all 31 FP numbers, and possibility that those FP numbers inside one FP number can contain also other FP numbers ( 1984 bits - 64 bits is 1920 bits available for first FP number inside 1984 bit “original mother number”, this 1920 bit number becomes “second mother number”, 1920 - 64 bits is 1856 bits available information space for first FP number inside “second mother number” etc.), so very long chains of floating point numbers can be made. One floating point number, “original mother number” can contain in 1984 bits hundreads of other FP numbers if those others are also used as “second mother number”, “third mother number” etc. that themselves contain more FP numbers inside them. So instead of blockchains of gigabytes length there is just one or only few 64 bit “mother” floating point numbers, each storing information of dozens or less other FP numbers. This 64 bit FP has mantissa accuracy expanded up to 2028 bits maximum (first FP number, "original mother number) using computing in software (which is slow). I don t know how close this “floating point blockchain” is to ordinary blockchan techniques. But perhaps just one or couple of 64 bit FP numbers are needed to use this “FP number as blockchain” technique, and to replace ordinary blockchains that require gigabytes of storage space, if just 64 bits of FP information that inside itself contains hundreads of other FP numbers is needed. Can ordinary blockchains be replaced with “floating point blockchain” I don t know. FP numbers can be used to store other information than just blockchains. Lots of information can be inside one 64 bit “original mother” floating point number. This is not data compression because data is not compressed, data is just repsented as floating point number (inside each other). But these texts are about data compression: “ACE: Adaptive cluster expansion for maximum entropy”, “Phase shift migration using orthogonal beamlet transforms”, “Cyclic spectrum reconstruction from sub-Nyquist sampling dual sparse…”, “Xampling: analog to digital at sub-Nyquist rates”, “Reliable and efficient sub Nyquist sampling”, “Point cloud data compression using a space-filling curve”, and patents US 20040200734 “Apparatus and method for generating…” Sullivan, US 8274921 “System and method for communicating…”, US 9595976 “Folded integer encoding”, US 5182642 “Apparatus and method for the compression”… etc. Exponent of FP number is quite irrelevant in this method of using FP numbers as blockchain or data storage. The faster the FP number is computed the better in data storage application, so exponent is small, because 52 bits maximum accuracy is enough for almost every application. I don t know should exponent be large or small if FP numbers are used as blockchain. But using FP numbers inside each other saves storage space enormously compared to ordinary blockchain techniques. If it is not possible to multiply information space using second or third mother numbers etc., there still is first original mother number. When 32 X 64 is 2048 and 39 X 52 mantissa bits is 2048, simply dropping 20 least significant bits, for example dropping 1 bit from 20 numbers, now 32 64 bit numbers (some of them 63 bits) is in use, and 32 suits for binary systems. Almost 32 X “compression” is still better than no compression at all, and this is not data compression so “real” data compression can be added to improve efficiency still. Using 16 bit FP number with 11 bit mantissa, 39 X mantissa expansion is 429 bits, almost 27 X 16 bit which is 432 bits so 27 X “compression” dropping only 3 bits is possible. Also integer numbers can be inside one floating point mantissa, simply chained 16 + 16 bits etc. until about 2000 bits of mantissa space is used. It is still about 32 or 27 times “compression” with only mother number, if it is impossible to use other mother numbers inside one. This numbers inside one trick is used in computer arithmetics for a long time. Using floating point numbers in blockcahin etc. is still about 32 times smaller information space than using other techniques. Also exotic number systems can be used, like U-value number system in Neuraloutlet wordpress netpage, Zero Displacement Ternary ZDTNS, balanced ternary tau, Quote notation (Eric Hehner), Munafo PT number system and multiple base composite integer (both of them in MROB netpage), Paul Tarau s systems, Researchgate Rob Graigen “Alternative number system bases?” 2012 etc. Floating point numbers can be combined with analog delta sigma modulation. Using improved Hatami pseudo parallel delta sigma (Johansson et al 2014), multibit DS, or multirate DS (Hannu Tenhunen) even more “compression” is possible. Some of Tenhunen s papers read that up to 1400 bits multirate (1417 bits? or so) is possible DS modulator reach. Because it is 1 bit system, using perhaps 100 X oversampling, it has 14 X “compression ratio”. That multirate DS paper I have not found after I read first time, its seems to disappeared (?) from internet. But writer was Tenhunen and someone else. I don t know was oversampling ratio 100 or else. And using multibit DS with FP numbers. IF multibit DS uses 24 bits, it is one bit system, so compression ratio is 24 X. Using improved Hatami DS with 16 X pseudo parallel is 16 X compression. Pulse group keying patents (Clinton Hartmann) 2002, 2003, Additive Quantization (Martinez) also known as extreme vector compression (suits perhaps together with delta sigma modulation also), Qdigest algorithm, Finite State Entropy, Sparse Fourier Transform, Octasys Comp (van den Boom) etc. “real” data compression can be used to improve performance further still. Multipre description coding is also used with delta sigma, floating point can use it too. Exotic number systems can perhaps still improve performance, but there is no hardware where those could be used in direct hardware. “Direct digital synthesis using delta-sigma modulated signals” Orino is digital delta sigma. Using Bohr compactification, or dithering in signal, or Vector Phasehaping Synthesis and Feedback amplitide Modulation (FBAM), those two are sound synthesis methods but can be used in other signal processing perhaps also. Takis Zourntos has introduced “one bit oversampling without delta sigma”, it can be used also.That kind of very high information density but very small bitrate signal, whatever method it uses, exotic number system or floating point, or floating point and delta sigma together etc., can be used in satellite communication, space probe communication, or terrestial internet communication and in magnetic memory etc., anything that needs high information density, like in blockchains. Main principle is that one small bitwidth data sequence can have large information density when measured in binary bits, and several of those binary bits can be put inside this small bitwidth data, which is then expanded to its large binary bits containing binary information, either integer or floating point etc., and several information blocks can be chained together simply putting 16 + 16 +16 bit information in long bitchain if 16 bits is the information block, and this long bitchain for example about 2000 bits long inside one 64 bit floating point number. Now 64 bit number has 2000 bits of information, not just 64 bits. Now 64 bits can be send to receiving device which expands FP mantissa accuracy to 2000 bits end extracts information from it. Delta sigma modulation can use very efficient noise shaping, up to 60 or even over 80 decibels, 10 to 14 bits. Because DSM is one bit information, “compression ratio” of noise shaping is 10 X or 14 X. Compression ratio here means bitrate compression. Actually data is not compressed in floating point numbers and delta sigma values, data is only represented as floating point numbers and delta sigma values. So actual data compression can be used to improve performance further still. So other mother numbers inside first one is not needed, even one “mother number” is enough, if it is not theoretically possible to use several mother numbers inside first one. But even one 64 bit FP or FP + DSM number etc. is enough. Or to use exotic number systems, that would be perhaps even better. Unum / ubox computing can improve accuracy, for example 64 bit FP with 16 bit unum section, 80 bits together. Or use “Between fixed point and floating point by Dr. Gary Ray” (Chipdesignmag) model of “reversed elias gamma coding” to improve FP performance, or use unum and Gary Ray s model together in FP number, in its extra 16 bit section, when 64 bits is standard FP number (total FP number length is then 80 bits). Gal s accuracy tables “revisited” method (french) can also be used to improve FP performance if 39 X mantissa expansion is not used. Small microfloats can perhaps use Gal s revisited method better. 16 bit FP minifloat or 8 bit microfloat (which has very small mantissa) etc. So mini- and microfloats can also use accuracy expansion, not just big 64 or 80 bit FP numbers, and computing is faster. Gal s revisited method can also be used in big FP numbers, and 39 X mantissa expansion in small FP numbers (?). ODelta compression by Ossi Mikael Kalevo is another delta compression. Very small microfloats can use “differential floating point” which is similar to DPCM (differential PCM) that is different from linear PCM, similar small microfloats can use differential floating point, 8bit FP has very small accuracy if it is linear like PCM, but differential FP like DPCM can have better accuracy. “Information compression without data compression” is possible using several ways: 1: Delta values: 1.1: Multibit delta sigma, up to 24 bits, 32 bit DSM perhaps coming soon, if DSM is normally 1 bit, compression is 24 X., 1.2: Multirate DSM, 1400 bit multirate requires huge oversampling? Compression ratio unknown, 1.3: Improved Hatami pseudo parallel DSM, 16 X pseudo parallel is 16 X compression., 1.4: Using delta sigma modulation and floating point numbers together, 64 bit FP DSM is 1 bit with 52 bit accuracy and 1000 bit range, or is it? Idon t know how FP DSM works. So 1 bit of infarmation has 52 bit accuracy and 1000 bit range (if it is possible to do so), 1.5: Noise shaping DSM, up to 14 bits or perhaps more is possible using noise shaping with DSM, so 14 X compression. Noise shaping can be combined with previous methods. Takis Zourntos s and other delta models can be used. 2: Floating point numbers, 2.1: S. Boldo / Malcolm etc. mantissa expansion up to 39 times, 2.2: Unum / ubox computing, 2.3: Gary Ray s list of improved floating point techniques (elias gamma coding reversed etc.). 2.4: Gal s accuracy tables revisited method (french netpage). Both Unum and Gary Ray s methods can be combined, if for example standard 64 bit FP has additional 16 bit section, unum bits can be coded using Gary Ray s method etc., 64 bit standard FP + 16 bit unum elias gamma reversed coded etc in 80 bit FP number. 3: Using exotic number systems. There are hundreads of them. “Exotic number system” here means anything other than usual integer or floating point representation. 4: “Infinity computer”. Almost infinite accuracy. Lastly 5: nonstandard floating point representation. But is better to shift directly to exotic number systems in hardware than use totally nonstandard FP. “Floating point adder design flow” Michael Parker 2011 is another improved floating point design (claiming 1000 times improved accuracy?). But it uses nonstandard (non IEEE standard) FP, that is used in FPGAs. However it can be used to information space exopansion also, in FPGAs and other things that do not use standard FP numbers. In some internet message chain was that in Berkeley university experimental 13 bit FP that is like 32 bit standard FP number but uses only 13 bits not 32, was made, using “bit width reduction” or other technique. It is nonstandard FP number also. “A new uncerntainty-bearing floating point arithmetic” 2012 Chengpu Wang is nonstandard FP also. But standard FP can be improved using extra unum etc. section in standard FP number. Combined unum, Gary Ray s models, and mantissa expansion by Boldo / Malcolm or Gal s accuracy tables is perhaps possible? Differential floating point can be used in small 8 bits microfloats. Albert Weggener of Samplify Systems Inc. has patented several hardware data compression (floating point) methods.“Simplified floating point division and square root” Viitanen. Analog processing, for example in computing floating point numbers can be used, Glenn Cowan “Analog VLSI math co-processor” 2005. Now analog components can be 16nm small, so analog computing can be much more powerful than digital now. 16nm delta sigma modulator is pretty fast. It is strange that huge sums are spend for developing data compression methods, nearer and nearer Shannon limit. But much better “compression ratio” is available if information space is expanded. And it is lossless “compression”. So lossless information compression, up to dozens or hundreads times compression, is available. This information compression is not traditional compression, information is just represented in other form than usual integer or simple floating point. This information space expansion is much more better and fruitful method to “compress” information than usual data compression. Others such as “multiple base composite integer” etc., can be found to be suitable for this “compression”. “Precision arithmetic: a new floating-point arithmetic” (Wang), “Rigorous estimation of floating point round off errors with symbolic expansions” 2015, Intel ADX. There is “posit” arithmetic by John L. Gustafsson, that is not improved FP with extra bits like unum but replacement of FP with nonstandard model, and “less radical” than unums. Google Groups 11.8. 2017 “Beating posits in their own game” is John G. Savard s (Quadiblock) HGU / HGO and EGU models that are versions of posits, based on a-Law compression. At least mu-Law is logarithmic /analog compression and a-Law perhaps also. So posit / EGU number system can be used in analog hardware like logarithmic computing? 16nm analog computer with posit / EGU number system computing would be fast. In Google Groups 29.9 2017 “Issues with posits & how to fix them” is mentioned “valid”, another number system. Posit, valid, EGU or another system that has high accuracy can be used in information space expansion. If multiplying information space by using several mother numbers inside one is impossible, even one number with high accuracy is enough to store information with high “compression ratio”, when measured in binary bits. I prefer some high information density / very accurate number system like “magical skew number system” (Elmesry, Jensen, Katajainen) over traditional integer based systems, so exotic number system used in hardware is better. “Quantization and greed are good” Mroueh 2013, Additive Quantization AQ (Martinez). I don t know how “exotic” posit / valid / EGU is, and what is its maximum accuracy, in 64 bits or 80 bits. Also diffrential posit number system like DPCM is version of PCM can be used in “microposit” numbers like 4, 6 or 8 bit posit / valid / EGU numbers. Can Gary Ray s reversed elias gamma coding etc. used in posit / valid / EGU numbers? Dithering and noise shaping like those used in delta sigma modulation, up to 14 bits accuracy increase, can be used in small microfloats / microposits. Multiple description coding, multiple base composite integer, Bohr compactification etc. can be used. In Google Groups Forum by Rick C. Hodgin is 27.3 2018 “A right alternative to IEEE 754 s format” that has many aspects of computer arithmetic etc. discussed. “The slide number format” Ignaz Kohlberg is logarithmic scale so it is suitable for analog electronics? “Universal coding of the reals: alternative to IEEE floating points” Lindstrom, and “Provably correct posit arithmetic with fixed big integer” are other new publications. Bounded Integer Sequence Encoding BISE is used in hardware already but only in integers? “GATbx_V12 genetic algorithm genetic recombination”, “IIR filters using stochastic arithmetic”. In stackoverflow netpage “Algorithms based on number base systems? (closed)” 2011 are many different number systems, in stackexchange “Data structures: what is good encoding for phi-based balanced ternary?” 2012 is ternary numbers. There are residual-, reduntant-, index calculus- etc. number systems, “A new number system for faster multiplication” Hashemian 1996, “ZOT-binary: new number system”, “Hierachical residue number systems” (HRNS) Tomczak, “Number representations as purely data structures” Ivanovic 2002, in netpage XLNSresearch are logarithmic number systems, they can be used in analog electronics, “Abelian complexity in minimal subshifts” 2009. Analog electronics is manufactured at 16nm now, so analog circuit can beat digital in its own game. If analog compression, like quadrature PAL / NTSC TV compression or MUSE HD TV compression, is used, and magnetic memory can be analog too using OUM magnetic phase memory which can store 1000 bits accuracy in one analog memory “spot” when digital magnetic memory stores 3 bits in one “spot”. Not to mention analog optical computers. Analog signal is noisy but noise shaping is invented to improve signal quality. “New approach based on compressive sampling” 2014 Bonavolonta is sparse sampling that needs only 1/50th of signal to reconstruct it, so it has compression ratio of 50 times. There is book “Dynamics of number systems - computation with arbitrary precision” by Petr Kurka which is good representation of different number systems and how to use them. “New formats for computing with real numbers” Hermigo 2015. Finite State Entropy uses asymmetrical number system. “Asymmetric high-radix signed-digit number systems for carry-free addition”, “Dynamical directions in numeration” Barat, “Dealing with large datasets (by throwing away most of the data)” by A. Heavens is “massive data compression”, “Optimal left to right binary signed digit recoding” Joye 2000, “Adapted modular number system” AMNS, “A reduntant digit floating point system” Fahmy 2003, “Arithmetic units for high performance digital signal processor” Lai 2004, “Simplified floating point division and square root” Viitanen, “A floating-point ADC with variable gain pipeline stages” Kosonen, “Design and implementation of a self-calibrating floating-point analog-to-digital converter” (differential predictive ADC) 2004, “Abelian complexity in minimal subshifts” Saari 2011, “jittered random sampling” concept (Luo 2014, and Parsons 2014), “Sparse composite quantization”, “Pairwise quantization”, “Universal rate-efficient scalar quantization”, “A compression sampling sparse AR model” Chang, Ye et al 2014, “algebraic integer quantization” concept, “Multiple base number systems” Dimitrov, beta encoder, “Liao style numbers of differential systems”, “Tournament coding of integers” Teuhola, “A golden ratio notation for the real numbers” Pietro Di Gianantonio, and “1-bit digital neuromorphic signal path with dither”. “Preferred numbers” are numbers which go for geometric series, like Renard series numbers and E-series numbers. If integer processing uses instead of binary integer uses E-series or Renard series numbers, or other preferred numbers, perhaps better integer accurcay can be achieved in integer computing or floating point computing. Perhaps multiple base composite integer, or Dimitrov s multiple base number system can be combined with preferred numbers etc. “Novaloka maths on the number horizon - beyond the abacus” is another page which deals with number systems. Perhaps my cubic bitplane approach (early in this text chain) can use cubic vector quantization or Additive Quantization (Martinez) to compress cubic bitplane or vectors inside it. Cubic bitplane can also use “iterated function system” like “L-system” vectors inside cubic bitplane to find information among bits inside 3D cubic bitplane. If delta-sigma modulator uses 1 bit external bitrate but it has 16 bit internal multibit or multirate processing, does that mean 16 to 1 data “compression” ratio? So (partly analog or direct digital) delta sigma or Takis Zourntos etc. modulators could be used for lossless data compression of 16:1 ratio, not just audio etc. applications. Or use other ADC structure if it offers similar possibilities. Multiterminal source coding, multiple description coding, “Generalized massive optimal data compression” A. Heavens, Pixinsight dithering, Gary Ray s model of floating point with Elias gamma exponent reversed, Microsoft 8 bit FP format for deep learning has only 2 bit significand, but if it is any way comparable to IEEE standard 2 bits can perhaps be expanded up to 39 times, so it is real accurate 8 bit FP format using software mantissa expansion. Intel has its own deep learning 16 bit FP with 7 bit mantissa, it is IEEE comparable (similar to 32 bit FP standard but only 16 bits with 7 bit significand), so mantissa expansion should work with it. For AI shared exponent flixed and floating point number systems (dynamic fixed point, Flexpoint, Courbariaux 2015, Koster 2017, and stochastic rounding number system Gupta 2015), Flexpoint is 16 bit integer with 5 bit shared exponent, and 8 bit FP that has one of the exponents shared, etc. systems. Then “Universal lossless coding of sources with large and unbound alphabets”, “Accuracy-guaranteed bit-width optimization” (Minibit and Minibit+). Posit floating point is relative to a-Law logarithmic encoding according to John G. Savard s EGU floating point, so Gal s accuracy tables (revisited) method should expand posit significand also, if S.Boldo s and Malcolm mantissa expansion methods do not work in posit. Gal s tables work in logarithmic and floating point. In Texas Instruments “Where will floating point take us?” page is 8 bit exponent but only 1 bit implied mantissa format. “Representing numeric data in 32 bits while preserving 64 bit precision” 2015 Neal is 64 bit to 32 FP, similarly 128 bit FP can truncated to 64. IBM mainframes had 64 bit FP truncated to 32. Quire is version of unum, it makes dot products, they make vectors, so cubic bitplane can use quires like other vectors. Additive Quantization works with quires? If quire is vector type format it can be used in video and audio (audio like TwinVQ). “Profiliting floating point value ranges for reconfigurable implementation” Brown 2012 has double fixed point, between FP and fixed point format. Also integer accuracy can be increased, dynamic fixed point with stochastic rounding 2017 Essam has 3X8 bit integer with almost 64 bit FP accuracy. Making 64, 32, 16 or 8 bit integer with Bounded integer sequence encoding that uses ZDTNS or order-3 Fibonacci (tribonacci, Sayood, Lossless compression handbook) or “constrained triple-base number sytem”, if not using magigal skew or Paul Tarau s etc exotic numbers or Quote notation, and stochastic rounding, and then Flexpoint style (shared) exponent of 5-16 bits and lastly dithering to improve accuracy. It would be pretty accurate integer. Quaternary BISE can be used, “A survey of quaternary codes and their binary image” Özkaya 2009. “Compactification of integers” Royden Wysoczanski 1996, Bohr compctification. “Twofold fast summation” Latkin 2014, “Improving floating point compression through binary masks” , the Aggregate netpage “magical algorithm”, “Unifying bit-width optimization for fixed-point and floating-point design”, “Improving floating-point accuracy: lazy approach”, bounded floating point, SZ Floating point compression, 10,11 and 14 bit FP graphic processing formats, 14 bit FP has shared exponent. Differential 4-8 bit floating point microfloat can be useful in video or audio coding, or 4-8 bit differential posit / quire, or differential bounded FP, -EGU, -Gary Ray s elias gamma exponent etc. differential microfloat-similar small bit number. Modern FPUs have 512 bit wide FP processing, so when small mantissa is expanded to hundreads of bits accuracy FPU can process it right away, in a single cycle if number when expanded is 512 bits or smaller. 16 or 32 bit FP number first packed with mantissa accuracy, then send through internet or memory in 16-32 bit form, can be expanded in processor from 16 or 32 bits to hundreads of bits, then processed. If data compression is needed asymmetrical numeral systems that Finite State Entropy uses are most likely used, but I don t know how well or bad some of the other methods mentioned in this text will work with FSE or not. FSE asymmetric encoding can be reserved to final level of “numbers inside each other” encoding, rest of number layers, mother numbers etc. can work without it. Delta sigma modulators are 32 bit now, 64 bit in tomorrow, only 4-8 bit DSM is needed to 16 bit information block because noise shaping has max 10- 12 bits efficiency (60 - 70 dB) so DSM signal can be used "numbers inside each other principle " like floating point, 4-8 bit DSM signal X 16 - 8 to 64 bit DSM signal, so max 15 layers is possible to put numbers inside mother numbers. “Differential ternary” Nadezda Bazunova, like “differential calculus D 3 = 0” (Bazunova), “Ternary differential models” Pilitowska, Liao-style numbers, “A modified adaptive nonuniform sampling delta modulation ANSDM”, “Fascinating triangular numbers” Shyamsundergupta. “Cascaded Hadamart based parallel sigma delta modulator” Alonso, “A novel multi-bit parallel delta/sigma FM-to-digital converter” Wisland, “A new number system using alternate Fibonacci numbers” Sinha 2014. Perhaps Quote notation can be used with BISE (bounded integer) encoding, doubling its efficiency. Perhaps Quote notation can be coupled with ternary, asymmetric, skew number system etc. numerals to improve efficiency. If not direct digital DSM (Orino) is used, analog VCO-ADC like structures that have two VCOs per one DSM ADC, “Ternary R2R DAC design for improved efficiency”, “Edwards and Penney differential equations computing modeling solution”. Erkki Hartikainen: “Mathematics without quantors is possible” 2015, nevermind his ideological writings focus only to scientific text, altough it is bit difficult to find. “Tridimensional trivalent graph”, trivalent sets. “Amplituhedron” is used in quantum physics, it shortens difficult equations, similar can be used in true compact numbers as compact number or other, or in cubic bitplane as vector or other, or to make amplituhedron bitplane, or in quasicrystal bitplane if possible. 64 bit integer has accuracy of 64 bits and 64 bit FP accuracy of 53 bits (but large range). But when 64 bit number has accuracy of 2000 bits that is enormous “information compression” ratio. This accuracy is available in standard FP number. Why it is not used? I have written about this information space expansion thing two years now. I have made several simple calculation mistakes when I wrote those previous texts, because I write them in a hurry and then I don t check what I have written, so sometimes in the text there is very clear counting mistakes, wrong numbers in wrong places etc. I am not a mathematician so I don t actually often understand papers I am reading in internet, so there may be some fundamental mistakes in the texts I have written. I wrote them so that someone who understands math would perhaps get some ideas from my incoherent writings, I myself don t know are my ideas wrong or right or am I totally wrong or is there perhaps some useful ideas in my texts. In previous texts I used star mark to define two s complement, so 2 plus star mark and then 24 did mean two s complement 24 exponents, but now those star marks seem to disappeared from my text somehow, so now it reads 224, so when two s complement marks have disappeared the text seems quite strange whenever two s complement is in question. So when obscure three number sequencies that does not seem to make sense are in my text it propably is two s complement with star mark missing between the one number and two numbers to mark two s complement.